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参数资料
| 型号： | MSP430C412IRTD |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 16-BIT, MROM, 8 MHz, RISC MICROCONTROLLER, PQCC64 |
| 封装： | PLASTIC, QFN-64 |
| 文件页数： | 4/58页 |
| 文件大小： | 1160K |
| 代理商： | MSP430C412IRTD |
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MSP430x41x
MIXED SIGNAL MICROCONTROLLER
SLAS340H MAY 2001 REVISED APRIL 2007
12
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
special function registers
Most interrupt and module enable bits are collected into the lowest address space. Special function register bits
that are not allocated to a functional purpose are not physically present in the device. Simple software access
is provided with this arrangement.
interrupt enable 1 and 2
7
654
0
OFIE
WDTIE
32
1
rw-0
Address
0h
ACCVIE
NMIIE
rw-0
7
654
0
32
1
Address
1h
BTIE
rw-0
WDTIE:
Watchdog-timer interrupt enable. Inactive if watchdog mode is selected. Active if watchdog timer is config-
ured in interval timer mode.
OFIE:
Oscillator-fault-interrupt enable
NMIIE:
Nonmaskable-interrupt enable
ACCVIE:
Flash access violation interrupt enable
BTIE:
Basic Timer1 interrupt enable
interrupt flag register 1 and 2
7
654
0
OFIFG
WDTIFG
32
1
rw-0
rw-1
rw-(0)
Address
02h
NMIIFG
7
654
0
32
1
Address
3h
BTIFG
rw-0
WDTIFG:
Set on watchdog-timer overflow (in watchdog mode) or security key violation. Reset with VCC power-up,
or a reset condition at the RST/NMI pin in reset mode.
OFIFG:
Flag set on oscillator fault
NMIIFG:
Set via RST/NMI pin
BTIFG:
Basic Timer1 interrupt flag
module enable registers 1 and 2
7
654
0
32
1
Address
04h/05h
Legend: rw0,1:
Bit Can Be Read and Written. It Is Reset or Set by PUC.
rw(0,1):
Bit Can Be Read and Written. It Is Reset or Set by POR.
SFR Bit Not Present in Device.
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