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参数资料
型号： MSP430F5634IZQW
厂商： TEXAS INSTRUMENTS INC
元件分类： 微控制器/微处理器
英文描述： 16-BIT, FLASH, 20 MHz, RISC MICROCONTROLLER, PBGA113
封装： GREEN, PLASTIC, BGA-113
文件页数： 60/101页
文件大小： 1073K
代理商： MSP430F5634IZQW
PRODUCTPREVIEW
MSP430F563x
www.ti.com
SLAS650A – JUNE 2010 – REVISED JULY 2010
12-Bit DAC, Supply Specifications
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
UNIT
AVCC
Analog supply voltage
AVCC = DVCC, AVSS = DVSS = 0 V
2.20
3.60
V
DAC12AMPx = 2, DAC12IR = 0,
DAC12IOG = 1
3 V
65
110
DAC12_xDAT = 0800h
VeREF+ = VREF+ = 1.5V
DAC12AMPx = 2, DAC12IR = 1,
DAC12_xDAT = 0800h,
65
110
Supply current, single DAC
VeREF+ = VREF+ = AVCC
IDD
A
channel(1) (2)
DAC12AMPx = 5, DAC12IR = 1,
DAC12_xDAT = 0800h,
2.2 V/3 V
300
VeREF+ = VREF+ = AVCC
DAC12AMPx = 7, DAC12IR = 1,
DAC12_xDAT = 0800h,
1000
VeREF+ = VREF+ = AVCC
(1)
No load at the output pin, DAC12_0 or DAC12_1, assuming that the control bits for the shared pins are set properly.
(2)
Current into reference terminals not included. If DAC12IR = 1 current flows through the input divider; see Reference Input specifications.
12-bit DAC, Linearity Specifications (See Figure 9)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX UNIT
Resolution
12-bit monotonic
12
bits
VeREF+ = 1.5 V, DAC12AMPx = 7, DAC12IR = 1
2.2 V
±2
TBD
INL
Integral nonlinearity(1)
LSB
VeREF+ = 2.5 V, DAC12AMPx = 7, DAC12IR = 1
3 V
±2
±4
VeREF+ = 1.5 V, DAC12AMPx = 7, DAC12IR = 1
2.2 V
±0.4
TBD
DNL
Differential nonlinearity(1)
LSB
VeREF+ = 2.5 V, DAC12AMPx = 7, DAC12IR = 1
3 V
±0.4
±1
VeREF+ = 1.5 V,
DAC12AMPx = 7,
2.2 V
±21
DAC12IR = 1
Without calibration(1) (2)
VeREF+ = 2.5 V,
DAC12AMPx = 7,
3 V
±21
DAC12IR = 1
EO
Offset voltage
mV
VeREF+ = 1.5 V,
DAC12AMPx = 7,
2.2 V
±1.5
DAC12IR = 1
With calibration(1) (2)
VeREF+ = 2.5 V,
DAC12AMPx = 7,
3 V
±1.5
DAC12IR = 1
Offset error temperature
V/°
dE(O)/dT
2.2 V/3 V
±10
coefficient(1)
C
VeREF+ = 1.5 V
2.2 V
±2.5 %FS
EG
Gain error
R
VeREF+ = 2.5 V
3 V
±2.5
ppm
Gain temperature
of
dE(G)/dT
2.2 V/3 V
10
coefficient(1)
FSR/
°C
DAC12AMPx = 2
165
Time for offset
tOffset_Cal
DAC12AMPx = 3, 5
2.2 V/3 V
66
ms
calibration(3)
DAC12AMPx = 4, 5, 6
16.5
(1)
Parameters calculated from the best-fit curve from 0x0F to 0xFFF. The best-fit curve method is used to deliver coefficients “a” and “b” of
the first-order equation: y = a + bx. VDAC12_xOUT = EO + (1 + EG) × (VeREF+/4095) × DAC12_xDAT, DAC12IR = 1.
(2)
The offset calibration works on the output operational amplifier. Offset Calibration is triggered setting bit DAC12CALON
(3)
The offset calibration can be done if DAC12AMPx = {2, 3, 4, 5, 6, 7}. The output operational amplifier is switched off with DAC12AMPx =
{0, 1}. It is recommended that the DAC12 module be configured prior to initiating calibration. Port activity during calibration may effect
accuracy and is not recommended.
Copyright 2010, Texas Instruments Incorporated
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