参数资料
型号: MSX532
元件分类: 数字信号处理外设
英文描述: DSP-CROSSBAR SWITCH, PBGA792
封装: PLASTIC, BGA-792
文件页数: 2/5页
文件大小: 139K
代理商: MSX532
MSX532 Mini Data Sheet- Matrix Switching Crossbar Device
Page 2
Last Modified: 11/8/99
I-Cube, Inc.
PRELIMINARY
1. Switch Matrix
The MSX532 is an SRAM-based, bit-oriented
switching device. The device can be configured and
controlled by storing information into the appropriate
SRAM cells and configuration registers. As shown in
Figure 2, the main functional block of the device is a
switch
matrix.
The
Active
SRAM
cells
are
responsible for establishing connections in the switch
matrix by turning ON a pass transistor. The two
SRAM cells are arranged so that a double buffered
scheme can be employed. Through the use of the WR
(an internal signal) and UPDATE signals, it is
possible to store a second configuration map in the
Loading SRAM while the Active SRAM establishes
the connection. The UPDATE pin then transfers the
information in the Loading SRAM to the Active
SRAM
for
a
simultaneous
switch
matrix
configuration change. The configuration for the
Loading SRAM can be downloaded to the device
through the JTAG or RapidConfigure Interface.
1
0
2
34
567
I/O Port Pins
Permanent Connection
Pass Transistor
Loading
SRAM
Cell
Active
SRAM
Cell
WR
Data
UPDATE
Programmable I/O Buffers
Figure 2: MSX Switch Matrix Diagram
2. Input/Output Buffers (IOBs)
Each signal in the switch matrix is connected to a
programmable
IOB,
which
is
independently
configured
through
either
the
JTAG
or
RapidConfigure Interface. The IOB attribute includes
its signal direction (in, out or bi-directional), slew
rate control (for outputs) and data flow mode (flow-
through or registered). The signal can also be
inverted at the output. Figure 3 shows a basic block
diagram of an IOB with the sources for the three
control signals (IE, OE and CLK). For any given port
number, these three control signals can be selected
from one of two sources. The control signals are
explained in more detail in the following section. The
different IOB functions are listed and described in
Table 1.
I/O Port
BR
IN
OUT
Slew
Rate
CLK_OUT
Switch
Matrix
IE
OE
DQ
QD
CLK_IN
{
CLK
Next
neighbor
Next
neighbor
Sources
CLK
Sources
Figure 3: MSX IOB Block Diagram
3. Control Signals
The control signals for each IOB are Input Enable
(IE), Output Enable (OE) and Clock (CLK). Each
IOB can choose the source of each control signal
from two input sources. Figure 1 shows how the
control signals are distributed in the device with P0-
P132 selecting IE from either IE_0 or IE_1, OE from
OE_0 or OE_1, and CLK from CLK_0 or CLK_1.
Likewise, P133-P265 selects IE from either IE_1 or
IE_2, OE from OE_1 or OE_2, and CLK from
CLK_1 or CLK_2.
Besides the 2 clock sources, each individual IOB (Px)
can choose the next-neighbor IOB (Px+1) as its clock
source.
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