4, 8 Meg x 36 Parity DRAM SIMMs
DM45.pm5 – Rev. 3/97
Micron Technology, Inc., reserves the right to change products or specifications without notice.
1997, Micron Technology, Inc.
6
4, 8 MEG x 36
PARITY DRAM SIMMs
OBSOLETE
CAPACITANCE
PARAMETER
Input Capacitance: A0-A10
Input Capacitance: WE#
Input Capacitance: RAS0#, RAS1#, RAS2#, RAS3#
Input Capacitance: CAS0#, CAS1#, CAS2#, CAS3#
Input/Output Capacitance: DQ1-DQ8, DQ10-DQ17, DQ19-DQ26, DQ28-DQ35
Input/Output Capacitance: DQ9, DQ18, DQ27, DQ36
SYMBOL 16MB
C
I
1
C
I
2
C
I
3
C
I
4
C
IO
1
C
IO
2
32MB
140
188
50
50
18
28
UNITS
pF
pF
pF
pF
pF
pF
NOTES
2
2
2
2
2
2
70
94
50
25
10
16
MAX
AC ELECTRICAL CHARACTERISTICS
(Notes: 5, 6, 7, 8, 9, 10, 11, 12) (V
CC
= +5V
±
10%)
AC CHARACTERISTICS
PARAMETER
Access time from column address
Column-address hold time (referenced to RAS#)
Column-address setup time
Row-address setup time
Access time from CAS#
Column-address hold time
CAS# pulse width
CAS# hold time (CBR REFRESH)
CAS# to output in Low-Z
CAS# precharge time
Access time from CAS# precharge
CAS# to RAS# precharge time
CAS# hold time
CAS# setup time (CBR REFRESH)
Write command to CAS# lead time
Data-in hold time
Data-in setup time
Output buffer turn-off delay
FAST-PAGE-MODE READ or WRITE cycle time
Access time from RAS#
RAS# to column-address delay time
Row-address hold time
RAS# pulse width
RAS# pulse width
(
FAST PAGE MODE
)
Random READ or WRITE cycle time
RAS# to CAS# delay time
Read command hold time (referenced to CAS#)
Read command setup time
Refresh period (2,048 cycles)
RAS# precharge time
RAS# to CAS# precharge time
-6
SYMBOL
t
AA
t
AR
t
ASC
t
ASR
t
CAC
t
CAH
t
CAS
t
CHR
t
CLZ
t
CP
t
CPA
t
CRP
t
CSH
t
CSR
t
CWL
t
DH
t
DS
t
OFF
t
PC
t
RAC
t
RAD
t
RAH
t
RAS
t
RASP
t
RC
t
RCD
t
RCH
t
RCS
t
REF
t
RP
t
RPC
MIN
MAX
30
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
ns
ns
NOTES
45
0
0
15
10
15
15
3
10
10,000
4
21
13
35
10
60
10
15
10
0
3
35
4
18
18
15
17, 21
60
15
10
60
60
110
20
0
0
15
10,000
125,000
14
16
32
40
0