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参数资料
| 型号： | MTB36N06E |
| 厂商： | MOTOROLA INC |
| 元件分类： | JFETs |
| 英文描述： | TMOS POWER FET 36 AMPERES 60 VOLTS |
| 中文描述： | 36 A, 60 V, 0.04 ohm, N-CHANNEL, Si, POWER, MOSFET |
| 封装： | CASE 418B-02, D2PAK-3 |
| 文件页数： | 6/10页 |
| 文件大小： | 278K |
| 代理商： | MTB36N06E |
6
Motorola TMOS Power MOSFET Transistor Device Data
SAFE OPERATING AREA
1
10
60
VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS)
1
10
100
I
0
0.5
1
1.5
2.0
2.5
3
25
50
75
100
125
150
TA, AMBIENT TEMPERATURE (
°
C)
P
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
VGS = 20 V
SINGLE PULSE
TC = 25
°
C
25
50
75
100
125
150
220
TJ, STARTING JUNCTION TEMPERATURE (
°
C)
EA
Figure 12. Maximum Avalanche Energy versus
Starting Junction Temperature
A
200
180
160
140
120
100
80
60
40
20
0
ID = 10 A
t,TIME (ms)
Figure 13. Thermal Response
r
T
1
0.5
0.3
0.2
0.1
0.05
0.03
0.02
0.01
0.01
0.02
0.05
0.1
0.2
0.5
1
2
5
10
20
50
100
200
500
1000
D = 0.5
0.2
0.1
0.05
0.02
0.01
SINGLE PULSE
DUTY CYCLE, D = t1/t2
P(pk)
t1t2
R
θ
JC(t) = r(t) R
θ
JC
R
θ
JC = 1.5
°
C/W MAX
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t1
TJ(pk) – TC = P(pk) R
θ
JC(t)
Figure 14. Diode Reverse Recovery Waveform
di/dt
trr
ta
tp
IS
0.25 IS
TIME
IS
tb
10
μ
s
1 ms
10 ms
dc
R
θ
JA = 50
°
C/W
Board material = 0.065 mil FR–4
Mounted on the minimum recommended footprint
Collector/Drain Pad Size
≈
450 mils x 350 mils
Figure 15. D2PAK Power Derating Curve
2
4
20
40
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
100
μ
s
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