参数资料
型号: MTB50P03HDLG
厂商: ON Semiconductor
文件页数: 7/9页
文件大小: 0K
描述: MOSFET P-CH 30V 50A D2PAK
产品变化通告: Product Obsolescence 21/Jan/2010
产品目录绘图: MOSFET D2PAK
标准包装: 50
FET 型: MOSFET P 通道,金属氧化物
FET 特点: 逻辑电平门
漏极至源极电压(Vdss): 30V
电流 - 连续漏极(Id) @ 25° C: 50A
开态Rds(最大)@ Id, Vgs @ 25° C: 25 毫欧 @ 25A,5V
Id 时的 Vgs(th)(最大): 2V @ 250µA
闸电荷(Qg) @ Vgs: 100nC @ 5V
输入电容 (Ciss) @ Vds: 4900pF @ 25V
功率 - 最大: 2.5W
安装类型: 表面贴装
封装/外壳: TO-263-3,D²Pak(2 引线+接片),TO-263AB
供应商设备封装: D2PAK
包装: 管件
其它名称: MTB50P03HDLG-ND
MTB50P03HDLGOS
MTB50P03HDL, MVB50P03HDLT4G
TYPICAL ELECTRICAL CHARACTERISTICS
1.0
D = 0.5
0.2
0.1
0.1
0.05
0.02
0.01
SINGLE PULSE
P ( pk)
t 1
t 2
DUTY CYCLE, D = t 1 /t 2
R q JC (t) = r(t) R q JC
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t 1
T J(pk) - T C = P (pk) R q JC (t)
0.01
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
1.0E+00
1.0E+01
t, TIME (s)
Figure 14. Thermal Response
di/dt
3
2.5
2.0
R q JA = 50 ° C/W
Board material = 0.065 mil FR ? 4
Mounted on the minimum recommended footprint
Collector/Drain Pad Size ≈ 450 mils x 350 mils
I S
t a
t rr
t b
1.5
1
TIME
0.5
t p
0.25 I S
I S
0
25
50
75 100
T A , AMBIENT TEMPERATURE ( ° C)
125
150
Figure 15. Diode Reverse Recovery Waveform
ORDERING INFORMATION
Figure 16. D 2 PAK Power Derating Curve
Device
MTB50P03HDLG
MTB50P03HDLT4G
MVB50P03HDLT4G*
Package
D 2 PAK
(Pb ? Free)
D 2 PAK
(Pb ? Free)
D 2 PAK
(Pb ? Free)
Shipping ?
50 Units / Rail
800 / Tape & Reel
800 / Tape & Reel
?For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*MVB Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC ? Q101 Qualified and PPAP
Capable.
http://onsemi.com
7
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