参数资料
型号: MTU18N50E
厂商: MOTOROLA INC
元件分类: JFETs
英文描述: 18 A, 500 V, 0.31 ohm, N-CHANNEL, Si, POWER, MOSFET
文件页数: 1/8页
文件大小: 160K
代理商: MTU18N50E
1
Motorola TMOS Power MOSFET Transistor Device Data
Designer's Data Sheet
TMOS E-FET.
Power Field Effect Transistor
N–Channel Enhancement–Mode Silicon Gate
This high voltage MOSFET uses an advanced termination
scheme to provide enhanced voltage–blocking capability without
degrading performance over time. In addition, this advanced TMOS
E–FET is designed to withstand high energy in the avalanche and
commutation modes. This new energy efficient design also offers a
drain–to–source diode with a fast recovery time. Designed for high
voltage, high speed switching applications in power supplies,
converters and PWM motor controls, these devices are particularly
well suited for bridge circuits where diode speed and commutating
safe operating areas are critical and offer additional safety margin
against unexpected voltage transients.
Robust High Voltage Termination
Avalanche Energy Specified
Source–to–Drain Diode Recovery Time Comparable to a
Discrete Fast Recovery Diode
Diode is Characterized for Use in Bridge Circuits
IDSS and VDS(on) Specified at Elevated Temperature
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Drain–to–Source Voltage
VDSS
500
Vdc
Drain–to–Gate Voltage (RGS = 1.0 M)
VDGR
500
Vdc
Gate–to–Source Voltage — Continuous
Gate–to–Source Voltage — Non–Repetitive (tp ≤ 10 ms)
VGS
VGSM
± 20
± 30
Vdc
Vpk
Drain Current — Continuous
Drain Current — Continuous @ 100
°C
Drain Current — Single Pulse (tp ≤ 10 s)
ID
IDM
18
12
63
Adc
Apk
Total Power Dissipation
Derate above 25
°C
PD
223
1.78
Watts
W/
°C
Operating and Storage Temperature Range
TJ, Tstg
– 55 to 150
°C
Single Pulse Drain–to–Source Avalanche Energy — Starting TJ = 25°C
(VDD = 75 Vdc, VGS = 10 Vdc, PEAK IL = 18 Apk, L = 3.0 mH, RG = 25 )
EAS
1620
mJ
Thermal Resistance — Junction to Case
Thermal Resistance — Junction to Ambient
R
θJC
R
θJA
0.56
62.5
°C/W
Maximum Lead Temperature for Soldering Purposes, 1/8
″ from case for 10 seconds
TL
275
°C
E–FET and Designer’s are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.
REV 1
Order this document
by MTU18N50E/D
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
MTU18N50E
TMOS POWER FET
18 AMPERES
500 VOLTS
RDS(on) = 0.31 OHM
D
S
G
N–Channel
PRELIMINARY CASE
MAX 220
Motorola, Inc. 1997
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