参数资料
型号: MUNICH128X
厂商: SIEMENS A G
元件分类: 微控制器/微处理器
英文描述: 4 CHANNEL(S), 8.192M bps, LOCAL AREA NETWORK CONTROLLER, PQFP160
封装: METRIC, PLASTIC, QFP-160
文件页数: 13/39页
文件大小: 227K
代理商: MUNICH128X
MUNICH128X
Pin Descriptions
Semiconductor Group
20
1997-12-01
Table 3
Pin Descriptions by Functional Block
Port 2 Serial Interface
Pin No.
Symbol
Type Description
96
RxCLK2
I
Receive Clock 2
The clock input pin used for sampling the data on
RxD2. The MUNICH128X supports the following PCM
clock rates, programmed via the MODE1 register:
T1: 1.536 MHz, 1.544 MHz, 3.088 MHz, 6.176 MHz;
E1: 2.048 MHz, 4.096 MHz, 8.192 MHz.
94
RxD2
I
Receive Data 2
The data input pin which is sampled using RxCLK2.
95
RSP2
I
Receive Synchronization Pulse 2
The input pin used for Rx PCM frame synchronization;
the synchronization pulse marks the
first bit in the
PCM frame.
90
TxCLK2
I
Transmit Clock 2
The clock input used for clocking out the data on
TxD2. In most applications, the signal that drives this
pin is externally connected to RxCLK2.
92
TxD2
O
Transmit Data 2
Provides the data which is clocked out of the
MUNICH128X by TxCLK2; data is push-pull for active
bits in the PCM frame and TRISTATE for inactive
bits.
91
TSP2
I
Transmit Synchronization Pulse 2
The input pin used for Tx PCM frame synchronization;
the synchronization pulse marks the
last bit in the
PCM frame.
93
TxDEN2
O
Transmit Data Enable 2
An active low output signal which specifies data on the
TxD2 output pin is valid.
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