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参数资料
| 型号： | MUNICH128X |
| 厂商： | SIEMENS A G |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 4 CHANNEL(S), 8.192M bps, LOCAL AREA NETWORK CONTROLLER, PQFP160 |
| 封装： | METRIC, PLASTIC, QFP-160 |
| 文件页数： | 16/39页 |
| 文件大小： | 227K |
| 代理商： | MUNICH128X |
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MUNICH128X
Pin Descriptions
Semiconductor Group
23
1997-12-01
19
FRAME
s/t/s
Frame
FRAME indicates the beginning and end of an access.
FRAME is asserted to indicate a bus transaction is
beginning. While FRAME is asserted, data transfers
continue. When FRAME is deasserted, the
transaction is in the final phase.
When MUNICH128X is Master, FRAME is an output.
When MUNICH128X is Slave, FRAME is an input.
FRAME is sampled on the rising edge of CLK.
20
IRDY
s/t/s
Initiator Ready
IRDY indicates the bus master’s ability to complete
the current data phase of the transaction. It is used in
conjunction with TRDY. A data phase is completed on
any clock where both IRDY and TRDY are sampled
asserted. During a write, IRDY indicates that valid
data is present on AD(31:0). During a read, it indicates
the master is prepared to accept data. Wait cycles are
inserted until both IRDY and TRDY are asserted
together.
When MUNICH128X is Master, IRDY is an output.
When MUNICH128X is Slave, IRDY is an input.
IRDY is sampled on the rising edge of CLK.
21
TRDY
s/t/s
Target Ready
TRDY indicates a slave’s ability to complete the
current data phase of the transaction. During a read,
TRDY indicates that valid data is present on AD(31:0).
During a write, it indicates the target is prepared to
accept data.
When MUNICH128X is Master, TRDY is an input.
When MUNICH128X is Slave, TRDY is an output.
TRDY is sampled on the rising edge of CLK.
23
STOP
s/t/s
STOP
STOP is used by a slave to request the current master
to stop the current bus transaction.
When MUNICH128X is Master, STOP is an input.
When MUNICH128X is Slave, STOP is an output.
STOP is sampled on the rising edge of CLK.
Table 5
Pin Descriptions by Functional Block (cont’d)
PCI Interface
Pin No.
Symbol
Type Description
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