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参数资料
| 型号： | MX29F1610 |
| 厂商： | Macronix International Co., Ltd. |
| 元件分类： | DRAM |
| 英文描述： | The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each |
| 中文描述： | 该CAT24FC02是一个2 KB的EEPROM的国内256个8位每字举办的串行CMOS |
| 文件页数： | 10/39页 |
| 文件大小： | 669K |
| 代理商： | MX29F1610 |
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10
P/N: PM0506
REV.1.7, JUN. 15, 2001
MX29F1610A
CHIP ERASE
Chip erase is a six-bus cycle operation. There are two
"unlock" write cycles. These are followed by writing the
"set-up" command-80H. Two more "unlock" write cycles
are then followed by the chip erase command-10H.
Chip erase does not require the user to program the
device prior to erase.
The automatic erase begins on the rising edge of the last
WE pulse in the command sequence and terminates
when the status on DQ7 is "1" at which time the device
stays at read status register mode. The device remains
enabled for read status register mode until the CIR
contents are altered by a valid command
sequence.(Refer to table 3,6 and Figure 2,7,9)
A19
A18
A17
A16
Address Range[A19, -1]
SA0
0
0
0
0
000000H--01FFFFH
SA1
0
0
0
1
020000H--03FFFFH
SA2
0
0
1
0
040000H--05FFFFH
SA3
0
0
1
1
060000H--07FFFFH
SA4
0
1
0
0
080000H--09FFFFH
...
....
...
...
................
SA15
1
1
1
1
1E0000H--1FFFFFH
Table 5. MX29F1610 Sector Address Table
(Byte-Wide Mode)
SECTOR ERASE
Sector erase is a six-bus cycle operation. There are two
"unlock" write cycles. These are followed by writing the
set-up command-80H. Two more "unlock" write cycles
are then followed by the sector erase command-30H.
The sector address is latched on the falling edge of WE,
while the command (data) is latched on the rising edge of
WE.
Sector erase does not require the user to program the
device prior to erase. The system is not required to
provide any controls or timings during these operations.
The automatic sector erase begins on the rising edge of
the last WE pulse in the command sequence and
terminates when the status on DQ7 is "1" at which time
the device stays at read status register mode. The device
remains enabled for read status register mode until the
CIR contents are altered by a valid command
sequence.(Refer to table 3,6 and Figure 3,4,7,9))
ERASE SUSPEND
This command only has meaning while the the WSM is
executing SECTOR erase operation, and therefore will
only be responded to during SECTOR erase operation.
After this command has been executed, the CIR will
initiate the WSM to suspend erase operations, and then
return to Read Status Register mode. The WSM will set
the DQ6 bit to a "1". Once the WSM has reached the
Suspend state,the WSM will set the DQ7 bit to a "1", At
this time, WSM allows the CIR to respond to the Read
Array, Read Status Register and Erase Resume
commands only. In this mode, the CIR will not resopnd to
any other comands. The WSM will continue to run, idling
in the SUSPEND state, regardless of the state of all input
control pins, with the exclusion of PWD. PWD low will
immediately shut down the WSM and the remainder of the
chip.
ERASE RESUME
This command will cause the CIR to clear the suspend
state and set the DQ6 to a 0', but only if an Erase Suspend
command was previously issued. Erase Resume will not
have any effect in all other conditions.
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| MX29F1610A | The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each |
| MX29F1615 | The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MX29F1610A | 制造商:MCNIX 制造商全称:Macronix International 功能描述:16M-BIT [2M x8/1M x16] CMOS SINGLE VOLTAGE FLASH EEPROM |
| MX29F1610A-10 | 制造商:MCNIX 制造商全称:Macronix International 功能描述:16M-BIT [2M x8/1M x16] CMOS SINGLE VOLTAGE FLASH EEPROM |
| MX29F1610A-12 | 制造商:MCNIX 制造商全称:Macronix International 功能描述:16M-BIT [2M x8/1M x16] CMOS SINGLE VOLTAGE FLASH EEPROM |
| MX29F1610A-90 | 制造商:MCNIX 制造商全称:Macronix International 功能描述:16M-BIT [2M x8/1M x16] CMOS SINGLE VOLTAGE FLASH EEPROM |
| MX29F1610MC-10 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:x8/x16 Flash EEPROM |
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