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参数资料
| 型号： | MX29LV640UXBC-90 |
| 厂商： | MACRONIX INTERNATIONAL CO LTD |
| 元件分类： | PROM |
| 英文描述： | 4M X 16 FLASH 2.7V PROM, 90 ns, PBGA63 |
| 封装： | 11 X 12 MM, 1.30 MM HEIGHT, 0.80 MM PITCH, PLASTIC, MO-210, CSP-63 |
| 文件页数： | 13/66页 |
| 文件大小： | 1142K |
| 代理商： | MX29LV640UXBC-90 |
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20
P/N:PM0744
REV. 1.0, OCT. 29, 2003
MX29LV640U
This method is an alternative to that shown in Table 1,
which is intended for PROM programmers and requires
VID on address bit A9.
The SILICON ID READ command sequence is initiated
by writing two unlock cycles, followed by the SILICON
ID READ command. The device then enters the SILICON
ID READ mode, and the system may read at any address
any number of times, without initiating another command
sequence. A read cycle at address XX00h retrieves the
manufacturer code. A read cycle at address XX01h
returns the device code. A read cycle containing a sector
address (SA) and the address 02h returns 01h if that
sector is protected, or 00h if it is unprotected. Refer to
Table for valid sector addresses.
The system must write the reset command to exit the
Automatic Select mode and return to reading array data.
WORD PROGRAM COMMAND SEQUENCE
The command sequence requires four bus cycles, and
is initiated by writing two unlock write cycles, followed
by the program set-up command. The program address
and data are written next, which in turn initiate the
Embedded Program algorithm.The system is
not required
to provide further controls or timings. The device
automatically generates the program pulses and verifies
the programmed cell margin. Table 1 shows the address
and data requirements for the word program command
sequence.
When the Embedded Program algorithm is complete, the
device then returns to reading array data and addresses
are no longer latched. The system can determine the
status of the program operation by using Q7, Q6, or RY/
BY. See "Write Operation Status" for information on these
status bits.
Any commands written to the device during the
Embedded Program Algorithm are ignored. Note that a
hardware reset immediately terminates the programming
operation. The Word Program command sequence should
be reinitiated once the device has reset to reading array
data, to ensure data integrity.
Programming is allowed in any sequence and across
sector boundaries. A bit cannot be programmed from a
"0" back to a "1". Attempting to do so may halt the
operation and set Q5 to "1" ,” or cause the Data Polling
algorithm to indicate the operation was successful.
However, a succeeding read will show that the data is
still "0". Only erase operations can convert a "0" to a
"1".
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MX29LV800CBMC-70G | 制造商:Macronix International Co Ltd 功能描述:IC FLASH 8MBIT 70NS 44SOP 制造商:Macronix International Co Ltd 功能描述:MX29LV Series 3 V 8 Mb (1 M x 8 / 512 K x 16) 70 ns Parallel Flash - SOP-44 |
| MX29LV800CBMC-90G | 制造商:Macronix International Co Ltd 功能描述:IC FLASH 8MBIT 90NS 44SOP |
| MX29LV800CBMI-70G | 制造商:Macronix International Co Ltd 功能描述:IC FLASH 8MBIT 70NS 44SOP |
| MX29LV800CBTC-70G | 制造商:Macronix International Co Ltd 功能描述:IC FLASH 8MBIT 70NS 48TSOP 制造商:Macronix International Co Ltd 功能描述:MX29LV Series 3 V 8 Mb (1M x 8/512k x 16) 90 ns Parallel Flash - TSOP-48 |
| MX29LV800CBTC-90G | 制造商:Macronix International Co Ltd 功能描述:IC FLASH 8MBIT 90NS 48TSOP 制造商:Macronix International Co Ltd 功能描述:MX29LV Series 3 V 8 Mb (1M x 8/512k x 16) 90 ns Parallel Flash - TSOP-48 |
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