参数资料
型号: MX29LV640UXBC-90
厂商: MACRONIX INTERNATIONAL CO LTD
元件分类: PROM
英文描述: 4M X 16 FLASH 2.7V PROM, 90 ns, PBGA63
封装: 11 X 12 MM, 1.30 MM HEIGHT, 0.80 MM PITCH, PLASTIC, MO-210, CSP-63
文件页数: 14/66页
文件大小: 1142K
代理商: MX29LV640UXBC-90
21
P/N:PM0744
REV. 1.0, OCT. 29, 2003
MX29LV640U
AUTOMATIC CHIP/SECTOR ERASE
COMMAND
The device does not require the system to preprogram
prior to erase. The Automatic Erase algorithm automati-
cally pre-program and verifies the entire memory for an
all zero data pattern prior to electrical erase.The system
is not required to provide any controls or timings during
these operations. Table 2 shows the address and data
requirements for the chip erase command sequence.
Any commands written to the chip during the Automatic
Erase algorithm are ignored. Note that a hardware reset
during the chip erase operation immediately terminates
the operation.The Chip Erase command sequence should
be reinitiated once the device has returned to reading
array data, to ensure data integrity.
The system can determine the status of the erase op-
eration by using Q7, Q6, Q2, or RY/BY. See "Write Op-
eration Status" for information on these status bits. When
the Automatic Erase algorithm is complete, the device
returns to reading array data and addresses are no longer
latched.
Figure 3 illustrates the algorithm for the erase operation.
See the Erase/Program Operations tables in "AC Char-
acteristics" for parameters, and to Figure 16 for timing
diagrams.
SETUP AUTOMATIC CHIP/SECTOR ERASE
Chip erase is a six-bus cycle operation. There are two
"unlock" write cycles. These are followed by writing the
"set-up" command 80H. Two more "unlock" write cycles
are then followed by the chip erase command 10H, or
the sector erase command 30H.
Pins
A0
A1
Q7
Q6
Q5
Q4
Q3
Q2
Q1
Q0
Code(Hex)
Manufacture code
VIL
1
0000
1
0
C2H
Device code for MX29LV640U
VIH
VIL
1
0
1001
1
22D7H
TABLE 3. SILICON ID CODE
SECTOR ERASE COMMANDS
The Automatic Sector Erase does not require the
device to be entirely pre-programmed prior to
executing the Automatic Set-up Sector Erase
command and Automatic Sector Erase command.
Upon executing the Automatic Sector Erase
command, the device will automatically program and
verify the sector(s) memory for an all-zero data
pattern. The system is not required to provide any
control or timing during these operations.
When the sector(s) is automatically verified to
contain an all-zero pattern, a self-timed sector erase
and verify begin. The erase and verify operations are
complete when the data on Q7 is "1" and the data on
Q6 stops toggling for two consecutive read cycles, at
which time the device returns to the Read mode. The
system is not required to provide any control or timing
during these operations.
When using the Automatic Sector Erase algorithm,
note that the erase automatically terminates when
adequate erase margin has been achieved for the
memory array (no erase verification command is
required). Sector erase is a six-bus cycle operation.
There are two "unlock" write cycles.
These are
followed by writing the set-up command 80H. Two
more "unlock" write cycles are then followed by the
sector erase command 30H. The sector address is
latched on the falling edge of WE or CE, whichever
The MX29LV640U contains a Silicon-ID-Read operation
to supplement traditional PROM programming method-
ology. The operation is initiated by writing the read sili-
con ID command sequence into the command register.
Following the command write, a read cycle with
A1=VIL,A0=VIL retrieves the manufacturer code of C2H.
A read cycle with A1=VIL, A0=VIH returns the device
code of 22D7H for MX29LV640U.
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