参数资料
| 型号： | NB3N3002DTR2G |
| 厂商： | ON Semiconductor |
| 文件页数： | 4/8页 |
| 文件大小： | 0K |
| 描述： | IC CLK GEN XTAL-HCSL 16-TSSOP |
| 标准包装： | 2,500 |
| 类型： | 时钟发生器 |
| PLL： | 是 |
| 输入： | 晶体 |
| 输出： | HCSL |
| 电路数： | 1 |
| 比率 - 输入:输出： | 1:1 |
| 差分 - 输入:输出： | 无/是 |
| 频率 - 最大： | 200MHz |
| 除法器/乘法器： | 是/无 |
| 电源电压： | 3.135 V ~ 3.465 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 16-TSSOP |
| 包装： | 带卷 (TR) |
NB3N3002
http://onsemi.com
4
Symbol
Characteristic
Min
Typ
Max
Unit
fCLKIN
Clock/Crystal Input Frequency
25
MHz
fCLKOUT
Output Clock Frequency
25
200
MHz
qNOISE
PhaseNoise Performance
fCLK = 200 MHz/100 MHz
dBc/Hz
@ 100 Hz offset from carrier
103/109
@ 1 kHz offset from carrier
118/127.8
@ 10 kHz offset from carrier
122/136.2
@ 100 kHz offset from carrier
130/138.8
@ 1 MHz offset from carrier
138/138.2
@ 10 MHz offset from carrier
149/164
tjit(f)
RMS Phase Jitter (at 125 MHz @ 1 MHz 40 MHz)
0.25
0.50
ps
tjitter (TIE)
TIE RMS Jitter (Note 8)
fCLK = 200 MHz
2.5
ps
CycletoCycle RMS Jitter (Note 9)
fCLK = 200 MHz
2
5
CycletoCycle Peak to Peak Jitter (Note 9)
fCLK = 200 MHz
20
35
Period RMS Jitter (Note 9)
fCLK = 200 MHz
1.5
3
Period PeaktoPeak Jitter (Note 9)
fCLK = 200 MHz
10
20
OE
Output Enable/Disable Time
1.0
ms
tDUTY_CYCLE Output Clock Duty Cycle (Measured at cross point)
45
50
55
%
tR
Output Risetime (Measured from 175 mV to 525 mV, Figure 4)
175
340
700
ps
tF
Output Falltime (Measured from 525 mV to 175 mV, Figure 4)
175
340
700
ps
DtR
Output Risetime Variation (SingleEnded)
125
ps
DtF
Output Falltime Variation (SingleEnded)
125
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
6. NB3N circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit
is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained.
7. Measurement taken from differential output on singleended channel terminated with RS = 33.2 W, RL = 49.9 W, with load capacitance of
8. Sampled with 20000 cycles to capture jitter component down to 100 kHz.
9. Sampled with 20000 cycles.
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| NB3N3010BDG | 功能描述:时钟发生器及支持产品 AUDIO OVERSAMPLING RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
| NB3N3010BDR2G | 功能描述:时钟发生器及支持产品 AUDIO OVERSAMPLING CLOCK RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
| NB3N3011 | 制造商:ONSEMI 制造商全称:ON Semiconductor 功能描述:3.3 V 100 MHz / 106.25 MHz PureEdge Clock Generator with LVPECL Differential Output |
| NB3N3011DTEVB | 功能描述:BOARD EVAL FOR NB3N3011 RoHS:是 类别:编程器，开发系统 >> 评估演示板和套件 系列:* 标准包装:1 系列:PCI Express® (PCIe) 主要目的:接口，收发器，PCI Express 嵌入式:- 已用 IC / 零件:DS80PCI800 主要属性:- 次要属性:- 已供物品:板 |
| NB3N3011DTG | 功能描述:时钟合成器/抖动清除器 XTAL 3.3V LVPECL CLK RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
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