参数资料
型号: NB4N121KMNR2G
厂商: ON Semiconductor
文件页数: 2/9页
文件大小: 0K
描述: IC CLK BUFFER 1:21 400MHZ 52-QFN
标准包装: 2,000
类型: 扇出缓冲器(分配)
电路数: 1
比率 - 输入:输出: 1:21
差分 - 输入:输出: 是/是
输入: CML,LVCMOS,LVDS,LVPECL,LVTTL
输出: HCSL
频率 - 最大: 400MHz
电源电压: 3 V ~ 3.6 V
工作温度: -40°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 52-VFQFN 裸露焊盘
供应商设备封装: 52-QFN(8x8)
包装: 带卷 (TR)
NB4N121K
http://onsemi.com
2
Figure 2. Pinout Configuration (Top View)
VCC
Q0
Q1
Q2
Q3
Q4
IREF
VCC
Q6
Q3
Q5
GND
Q20
Q8
Q9
Q11
Q17
Q14
Q13
Q14
Q13
Q16
1
2
3
4
5
6
7
8
9
10
11
12
13
VTCLK
CLK
VTCLK
VCC
Q20
Q19
Q18
14
15
16
17
18
19
20
21
22
23
24
25
26
Q17
Q16
Q15
Q12
VCC
39
38
37
36
35
34
33
32
31
30
29
28
27
Q10
Q9
Q8
Q7
Q6
52
51
50
49
48
47
46
45
44
43
42
41
40
Q0
Exposed Pad (EP)
NB4N121K
Table 1. PIN DESCRIPTION
Pin
Name
I/O
Description
1
IREF
Output
Output current programming pin to select load drive. For 1X
configuration, connect IREF to GND, or for 2X configuration, connect
IREF to VCC (See Figure 9).
2
GND
Supply Ground. GND pin must be externally connected to power supply
to guarantee proper operation.
3, 6
VTCLK,
VTCLK
Internal 50 W Termination Resistor connection Pins. In the differential
configuration when the input termination pins are connected to the com-
mon termination voltage, and if no signal is applied then the device may
be susceptible to selfoscillation.
4
CLK
LVPECL Input
CLOCK Input (TRUE)
5
CLK
LVPECL Input CLOCK Input (INVERT)
7, 26, 39, 52
VCC
Positive Supply pins. VCC pins must be externally connected to a power
supply to guarantee proper operation.
8, 10, 12, 14, 16, 18, 20, 22,
24, 27, 29, 31, 33, 35, 37, 40,
42, 44, 46, 48, 50
Q[200]
HCSL Output
Output (INVERT)
9, 11, 13, 15, 17, 19, 21, 23,
25, 28, 30, 32, 34, 36, 38, 41,
43, 45, 47, 49, 51
Q[200]
HCSL Output
Output (TRUE)
Exposed Pad
EP
GND
Exposed Pad. The thermally exposed pad (EP) on package bottom (see
case drawing) must be attached to a sufficient heatsinking conduit for
proper thermal operation. (Note 1)
1. The exposed pad must be connected to the circuit board ground.
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