参数资料
| 型号： | NB4N121KMNR2G |
| 厂商： | ON Semiconductor |
| 文件页数： | 5/9页 |
| 文件大小： | 0K |
| 描述： | IC CLK BUFFER 1:21 400MHZ 52-QFN |
| 标准包装： | 2,000 |
| 类型： | 扇出缓冲器（分配） |
| 电路数： | 1 |
| 比率 - 输入:输出： | 1:21 |
| 差分 - 输入:输出： | 是/是 |
| 输入： | CML，LVCMOS，LVDS，LVPECL，LVTTL |
| 输出： | HCSL |
| 频率 - 最大： | 400MHz |
| 电源电压： | 3 V ~ 3.6 V |
| 工作温度： | -40°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 52-VFQFN 裸露焊盘 |
| 供应商设备封装： | 52-QFN（8x8） |
| 包装： | 带卷 (TR) |
NB4N121K
http://onsemi.com
5
Symbol
Characteristic
Min
Typ
Max
Unit
VOUTPP Output Voltage Amplitude (@ VINPPmin)
fin = 133 MHz
fin = 166 MHz
fin = 200 MHz
725
900
mV
tPLH,
tPHL
Propagation Delay to (See Figure 3)
CLK/CLK to Qx/Qx
550
800
950
ps
DtPLH,
DtPHL
Propagation Delay Variations Variation Per Each Diff Pair CLK/CLK to Qx/Qx
100
ps
tSKEW
Duty Cycle Skew (Note 9)
WithinDevice Skew, 1X Mode Only (Note 10)
WithinDevice Skew, 2X Mode (Note 10)
DevicetoDevice Skew (Note 10)
20
50
80
150
ps
tjit(f)
1
ps
Vcross
Absolute Crossing Magnitude Voltage
250
550
mV
DVcross
Variation in Magnitude of Vcross
150
mV
tr, tf
Absolute Magnitude in Output Risetime and Falltime
Qx, Qx
(From 175 mV to 525 mV)
175
340
700
ps
Dtr, Dtf
Variation in Magnitude of Risetime and Falltime (SingleEnded)
Qx, Qx
(See Figure 4)
1X
2X
125
150
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
7. Measured by forcing VINPP (MIN) from a 50% duty cycle clock source. Measurements taken with outputs in either 1X (all outputs loaded
50 W to GND) or 2X (all outputs loaded 25 W to GND) configuration, see Figure 9. For 1X configuration, connect IREF to GND, or for 2X
configuration, connect IREF to VCC. Typical gain is 20 dB.
8. Measured from the input pair crosspoint to each single output pair crosspoint across temp and voltage ranges.
9. Duty cycle skew is measured between differential outputs using the deviations of the sum of Tpw and Tpw+.
10.Skew is measured between outputs under identical transition @ 133 MHz.
11. Additive RMS jitter with 50% duty cycle clock signal using phase noise integrated from 12 KHz to 33 MHz
Figure 3. AC Reference Measurement
CLK
Q
tPLH
tPHL
VINPP = VIH(CLK) VIL(CLK)
= VIH(CLK) VIL(CLK)
VOUTPP = VOH(Q) VOL(Q)
= VOH(Q) VOL(Q)
DtPLH
DtPHL
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