参数资料
型号: NCN6000DTB
厂商: ON Semiconductor
文件页数: 24/36页
文件大小: 0K
描述: IC SMART CARD COMPACT 20-TSSOP
产品变化通告: Product Obsolescence 01/Jul/2009
标准包装: 75
应用: ATM 终端,气泵,ISM
接口: 微控制器
电源电压: 2.7 V ~ 6 V
封装/外壳: 20-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 20-TSSOP
包装: 管件
安装类型: 表面贴装
NCN6000
http://onsemi.com
30
Input Schmitt Triggers
All the Logic Input pins have builtin Schmitt trigger
circuits to prevent the NCN6000 against uncontrolled
operation. The typical dynamic characteristics of the related
pins are depicted in Figure 33.
The output signal is guaranteed to go High when the input
voltage is above 0.70*Vbat, and will go Low when the input
voltage is below 0.30*Vbat.
The CLOCK_IN pin has been design to provide a 40 MHz
bandwidth clock receiver input, capable to drive the internal
clock divider. This front end circuit yields a constant Duty
Cycle signal, according to the ISO specification, to the
external smart card, even when the NCN6000 division ratio
is 1:1.
Output
Vbat
ON
OFF
Vbat
0.70
*V
bat
Figure 33. Typical Schmitt Trigger Characteristic
Input
0.30
*V
bat
Interrupt Function
The NCN6000 flags the external microprocessor by pulling down the INT signal provided in pin 9. This signal is activated
by one of the here below referenced operations.
Table 6. Interrupt Functions
Pin Related
Clear Function
STATUS Pin 5
Card Insertion and
Extraction
11
Positive Going Chip Select, or logical
combination of Chip Select Low and
PWR_ON Positive Going
High = Card Presents
Low = No Card Inserted
DCDC Converter
Overloaded
15
Positive Going Chip Select, or logical
combination of Chip Select Low and
PWR_ON Positive Going
High = DCDC Operates Normally
Low = Output CRD_VCC Overloaded
Leaving the INT pin Low has no influence on the
NCN6000 internal behavior. It is up to the engineering to
decide when and how the interrupt will be cleared from this
pin. As described before, this can be achieved by either
providing a Chip Select positive transient, or by starting the
DCDC converter with the standard command PWR_ON =
H and CS =L.
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