参数资料
型号: NCP1207BDR2G
厂商: ON Semiconductor
文件页数: 10/17页
文件大小: 0K
描述: IC CTRLR PWM CM OVP OCP HV 7SOIC
标准包装: 1
输出隔离: 隔离
频率范围: 200kHz
输入电压: 10.6 V ~ 20 V
工作温度: -40°C ~ 125°C
封装/外壳: 8-SOIC(0.154",3.90mm 宽)7 引线
供应商设备封装: 7-SOIC
包装: 标准包装
其它名称: NCP1207BDR2GOSDKR
NCP1207A, NCP1207B
An optocoupler is generally used to transfer the feedback
information to the FB pin while providing the necessary
isolation. It introduces a limitation in how low the skip level
can be adjusted since an optocoupler cannot pull the FB
voltage below its Vce(sat), which is usually around 150 mV.
Therefore, in order to take into account temperature and
process variations, it is not recommended to set up the skip
level below 250 mV, which corresponds to a minimum
resistor Rskip of 420 Ω . The 150 mV is a much lower level
than what will usually be used (it sets the peak current when
entering skip mode at 5% of the maximum peak current).
If anyway a lower skip threshold is needed, care must be
taken to select an optocoupler with a Vce(sat) guaranteed to
be below the chosen skip level with enough margin.
Demagnetization Detection
The core reset detection is done by monitoring the voltage
activity on the auxiliary winding. This voltage features a
FLYBACK polarity. The typical detection level is fixed at
any potential ESD discharge that could appear on the pins.
The first ESD diode connected to the pad, exhibits a parasitic
capacitance. When this parasitic capacitance (10 pF
typically) is combined with R dem , a re--start delay is created
and the possibility to switch right in the drain--source wave
exists. This guarantees QR operation with all the associated
benefits (low EMI, no turn--on losses etc.). R dem should be
calculated to limit the maximum current flowing through
pin 1 to less than +3 mA/--2 mA. If during turn--on, the
auxiliary winding delivers 30 V (at the highest line level),
then the minimum R dem value is defined by: (30 V + 0.7 V)
/ 2 mA = 14.6 k Ω . This value will be further increased to
introduce a re--start delay and also a slight filtering in case of
high leakage energy.
Figure 19 portrays a typical V DS shot at nominal output
power.
400
50 mV as exemplified by Figure 17.
300
7.0
200
5.0
3.0
1.0
--1.0
POSSIBLE
RE--STARTS
0V
50 mV
100
0
Figure 19. The NCP1207A Operates in
Borderline / Critical Operation
Overvoltage Protection
Figure 17. Core reset detection is done through a
dedicated auxiliary winding monitoring
The overvoltage protection works by sampling the plateau
voltage 4.5 m s (NCP1207A) or 1.5 m s (NCP1207B)after the
TO INTERNAL
COMPARATOR
2
R esd
1
1
5
R dem
4
turn--off sequence. This delay guarantees a clean plateau,
providing that the leakage inductance ringing has been fully
damped. If this would not be the case, the designer should
install a small RC damper across the transformer primary
R int
ESD2
ESD1
Aux
inductance connections. Figure 20 shows where the
sampling occurs on the auxiliary winding.
4
3
R esd + R int = 28 k
Figure 18. Internal Pad Implementation
An internal timer prevents any re--start within 8.0 m s
(NCP1207A) or 4.5 m s (NCP1207B) further to the driver
going--low transition. This prevents the switching frequency
to exceed (1 / (T ON + 8.0 m s)) or (1 / (T ON + 4.5 m s)) but also
avoid false leakage inductance tripping at turn--off. In some
cases, the leakage inductance kick is so energetic, that a slight
filtering is necessary.
The NCP1207A/B demagnetization detection pad features
a specific component arrangement as detailed by Figure 18.
In this picture, the zener diodes network protect the IC against
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