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参数资料
| 型号： | NCP1271P100G |
| 厂商： | ON Semiconductor |
| 文件页数： | 4/21页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR PWM CM OVP OTP HV 7DIP |
| 标准包装： | 1,000 |
| 系列： | Soft-Skip™ |
| 输出隔离： | 隔离 |
| 频率范围： | 85kHz ~ 107kHz |
| 输入电压： | 10 V ~ 20 V |
| 工作温度： | -40°C ~ 125°C |
| 封装/外壳： | 8-DIP（0.300"，7.62mm），7 引线 |
| 供应商设备封装： | 7-PDIP |
| 包装： | 管件 |
NCP1271
Skip/ latch
1
I skip
8 V
?
+
13 us filter
S
R
Q
latch ? off, reset
when Vcc < 4V
8
HV
R skip
10V
4 .8 V
V skip = R skip * I skip or
V skip = 1.2 V when pin 1 is opened
V skip
V FB
skip
+
?
4.1 mA when Vcc > 0.6 V
0.2 mA when Vcc < 0.6 V
turn off
soft ? skip
&
fault
R ramp
FB
CS
2
3
V FB
10V
V CS
10V
16.7k
75.3k
1/3
V FB / 3
0
180 ns
LEB
2.85 V
TLD
?
+
V ss
(1V max)
?
+
1
V PWM
100uA
disable
soft
skip
Soft start/ soft ? skip
management
130ms
delay
PWM
?
+
4 ms/ 300 us soft
start
short
circuit
S
Q R
double
hiccup
B 2
Counter
&
12.6/
5.8 V
?
+
UVLO
9.1 V
?
+
20V
6
V CC
R CS
0
jittered ramp
current source
OR
turn on internal bias
V CC
4
Gnd
1
0
7.5% Jittering
65, 100 kHz
Oscillator
R Q
S
Max duty
= 80%
driver:
+500 mA
/ ? 800 mA
5
Drv
Figure 2. Functional Block Diagram
PIN FUNCTION DESCRIPTION
Pin No.
1
2
Symbol
Skip/latch
FB
Function
Skip Adjust or
Latchoff
Feedback
Description
A resistor to ground provides the adjustable standby skip level. Additionally, if this pin is
pulled higher than 8.0 V (typical), the controller latches off the drive.
An optocoupler collector pulls this pin low during regulation. If this voltage is less than
the Skip pin voltage, then the driver is pulled low and Soft ? Skip mode is activated. If this
pin is open (>3 V) for more than 130 ms, then the controller is placed in a fault mode.
3
CS
Current Sense
This pin senses the primary current for PWM regulation. The maximum primary current
is limited to 1.0 V / R CS where R CS is the current sense resistor. Additionally, a ramp
resistor R ramp between the current sense node and this pin sets the compensation ramp
for improved stability.
4
5
6
8
Gnd
Drv
V CC
HV
IC Ground
Driver Output
Supply Voltage
High Voltage
?
The NCP1271’s powerful output is capable of driving the gates of large Qg MOSFETs.
This is the positive supply of the device. The operating range is between 10 V (min) and
20 V (max) with a UVLO start threshold 12.6 V (typ).
This pin provides (1) Lossless startup sequence (2) Double hiccup fault mode (3)
Memory for latch ? off shutdown and (4) Device protection if V CC is shorted to GND.
http://onsemi.com
4
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