参数资料
| 型号： | NCP1280DR2G |
| 厂商： | ON Semiconductor |
| 文件页数： | 3/17页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR PWM PROG OVP HV 16SOIC |
| 产品变化通告： | Product Obsolescence 01/Jul/2009 |
| 标准包装： | 1 |
| 输出隔离： | 隔离 |
| 频率范围： | 140kHz ~ 320kHz |
| 输入电压： | 7 V ~ 25 V |
| 工作温度： | -40°C ~ 150°C |
| 封装/外壳： | 16-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 16-SOIC N |
| 包装： | 剪切带 (CT) |
| 其它名称： | NCP1280DR2GOSCT |
NCP1280
PIN DESCRIPTION
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Name
V in
NC
UV/OV
FF
CS
CSKIP
R T
DC MAX
SS
V EA
V REF
t D
OUT2
GND
OUT1
V AUX
Application Information
This pin is connected to the input voltage of the system. The voltage can be a rectified, filtered line voltage
or output of a power factor correction (PFC) front end. A constant current source supplies current from this
pin to the capacitor connected on the V AUX pin. The charge current is typically 13.8 mA. Maximum input
voltage is 700 V.
Not Connected.
Provides protection under line undervoltage and overvoltage conditions. The built in voltage range is
X 2:1. If needed, the OV function can be disabled by a Zener from this pin to ground.
An external resistor between V in and this pin adjusts the amplitude of the Feedforward Ramp in proportion
to V in . By varying the feedforward ramp amplitude in proportion to the input voltage, open loop line
regulation is improved.
Overcurrent sense input. If the CS voltage exceeds 0.48 V or 0.57 V, the converter enters the Cycle by
Cycle or Cycle Skip current limit mode, respectively.
The capacitor connected between this pin and ground sets the Cycle Skip period. A soft ? start sequence
follows at the conclusion of the fault period.
A single external resistor between this pin and GND sets the oscillator fixed frequency.
An external resistor between this pin and GND sets the voltage on the Max DC Comparator inverting
input. The duty cycle is limited by comparing the voltage on the Max DC Comparator inverting input to the
Feedforward Ramp.
An internal 6.2 m A current source charges the external capacitor connected to this pin. The duty cycle is
limited during startup by comparing the voltage on this pin to the Oscillator Ramp.
The error signal from an external error amplifier, typically supplied through an optocoupler, is fed into this
input and compared to the Feedforward Ramp. A series diode and resistor offset the voltage on this pin
before it is applied to the PWM Comparator inverting input.
Precision 5.0 V reference output. Maximum output current is 6 mA.
An external resistor between V REF and this pin sets the overlap delay between OUT1 and OUT2
transitions.
Output of the PWM controller with leading and trailing edge overlap delay. OUT2 can be used to drive a
synchronous rectifier topology, an active clamp/reset switch, or both.
Control circuit ground.
Main output of the PWM controller.
Positive input supply voltage. This pin is connected to an external capacitor for energy storage. An
internal current supplies current from V in to this pin. Once the voltage on V AUX reaches 11 V, the current
source turns OFF. It turns ON again once V AUX falls to 7 V. During normal operation, power is supplied to
the IC via this pin, by means of an auxiliary winding.
http://onsemi.com
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| NCP1282 | 制造商:ONSEMI 制造商全称:ON Semiconductor 功能描述:Power Factor Controllers |
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