参数资料
型号: NCP1378DR2
厂商: ON Semiconductor
文件页数: 2/15页
文件大小: 0K
描述: IC REG CTRLR FLYBACK PWM 8-SOIC
产品变化通告: LTB Notification 03/Jan/2008
标准包装: 2,500
PWM 型: 电流模式
输出数: 1
频率 - 最大: 100kHz
电源电压: 8.2 V ~ 18 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: 0°C ~ 125°C
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
包装: 带卷 (TR)
其它名称: NCP1378DR2OS
NCP1378
R*
+
12 V @ 1 A
GND
Universal
Network
+
OVP and
Demag
1
2
NCP1378
8
7
3
4
6
5
+
*Please refer to the application information section.
Figure 1. Typical Application Schematic
PIN FUNCTION DESCRIPTION
Y1 Type
Pin
1
Symbol
Demag
Function
Core reset detection and OVP
Description
The auxiliary FLYBACK signal ensures discontinuous operation and offers a
fixed overvoltage detection level of 5.2 V.
2
FB
Sets the peak current setpoint
By connecting an optocoupler to this pin, the peak current setpoint is
adjusted accordingly to the output power demand. By bringing this pin below
the internal skip level, you shut off the device.
3
CS
Current sense input and skip
cycle level selection
This pin senses the primary current and routes it to the internal comparator
via an L.E.B. By inserting a resistor in series with the pin, you control the
level at which the skip operation takes place.
4
5
6
7
8
GND
Drv
V CC
NC
HV
The IC ground
Driving pulses
Supplies the IC
--
High--voltage pin
--
The driver ’s output to an external MOSFET.
This pin is connected to an external bulk capacitor of typically 47 m F.
This unconnected pin ensures adequate creepage distance.
Connected to the high--voltage rail, this pin injects a constant current into the
V CC bulk capacitor and ensures a clean lossless startup sequence.
http://onsemi.com
2
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