参数资料
型号: NCP1393BDR2G
厂商: ON Semiconductor
文件页数: 10/16页
文件大小: 0K
描述: IC HALF BRIDGE DVR HV OSC 8SOIC
标准包装: 2,500
类型: 半桥
输入类型: 非反相
输出数: 2
电流 - 峰值输出: 1A
电源电压: 16V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOICN
包装: 带卷 (TR)
NCP1393B
The internal timing capacitor Ct is charged by current
which is proportional to the current flowing out from the
Rt pin. The discharging current I DT is applied when voltage
on this capacitor reaches 2.5 V. The output drivers are
disabled during discharge period so the dead time length is
given by the discharge current sink capability. Discharge
sink is disabled when voltage on the timing capacitor
reaches zero and charging cycle starts again. The charging
current and thus also whole oscillator is disabled during the
This is valuable for applications that are supplied from
auxiliary winding and V CC capacitor is supposed to provide
energy during PFC delay period.
For the resonant applications and light ballast applications
it is necessary to adjust minimum operating frequency with
high accuracy. The designer also needs to limit maximum
operating and startup frequency. All these parameters can be
adjusted using few external components connected to the Rt
pin as depicted in Figure 22.
PFC delay period to keep the IC consumption below 400 m A.
NCP1393
R t
V CC
R fstart
R fmax
R fmax ? OCP
R bias
D1
R t
C SS
(to secondary
voltage regulator)
R comp
TLV431
C comp
(to primary
current sensor)
Voltage Feedback
Figure 22. Typical Rt Pin Connection
Current Feedback
The minimum switching frequency is given by the Rt
resistor value. This frequency is reached if there is no
optocoupler or current feedback action and soft start period
has been already finished. The maximum switching
frequency excursion is limited by the Rf max selection. Note
that the F max value is influenced by the optocoupler
saturation voltage value. Resistor Rf start together with
capacitor C SS prepares the soft start period after PFC timer
elapses. The Rt pin is grounded via an internal switch during
the PFC delay period to assure that the soft start capacitor
will be fully discharged via Rfstart resistor.
There is a possibility to connect other control loops (like
current control loop) to the Rt pin. The only one limitation
lies in the Rt pin reference voltage which is Vref Rt = 3.5 V.
Used regulator has to be capable to work with voltage lower
than Vref Rt .
The TLV431 shunt regulator is used in the example from
Figure 22 to prepare current feedback loop. Diode D1 is
used to enable regulator biasing via resistor R bias . Total
saturation voltage of this solution is 1.25 + 0.6 = 1.85 V for
room temperature. Shottky diode will further decrease
saturation voltage. Rf max ? OCP resistor value, limits the
maximum frequency that can be pushed by this regulation
loop. This parameter is not temperature stable because of the
D1 temperature drift.
Brown ? Out Protection
The Brown ? Out circuitry (BO) offers a way to protect the
application from low DC input voltages. Below a given
level, the controller blocks the output pulses, above it, it
authorizes them. The internal circuitry, depicted by
Figure 23, offers a way to observe the high ? voltage (HV)
rail.
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