参数资料
| 型号： | NCP1393BDR2G |
| 厂商： | ON Semiconductor |
| 文件页数： | 14/16页 |
| 文件大小： | 0K |
| 描述： | IC HALF BRIDGE DVR HV OSC 8SOIC |
| 标准包装： | 2,500 |
| 类型： | 半桥 |
| 输入类型： | 非反相 |
| 输出数： | 2 |
| 电流 - 峰值输出： | 1A |
| 电源电压： | 16V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOICN |
| 包装： | 带卷 (TR) |
NCP1393B
Figure 28. BO Input Functionality ? V bulk < V bulk2 , PFC Start Follows
The I BO current sink is turned ON for 50 ms after any
controller restart to let the BO input voltage stabilize (there
can be connected big capacitor to the BO input and the I BO
is only 18.2 m A so it will take some time to discharge). Once
the 50 ms one shoot pulse ends the BO comparator is
supposed to either hold the I BO sink turned ON (if the bulk
voltage level is not sufficient) or let it turned OFF (if the bulk
voltage is higher than V bulk1 ). See Figures 25 through 28 for
better understanding on how the BO input works.
Latched ? Off Protection
There are some situations where the converter shall be
fully turned ? off and stay latched. This can happen in
presence of an overvoltage (the feedback loop is drifting) or
when an overtemperature is detected. Due to the addition of
a comparator on the BO Pin, a simple external circuit can lift
up this pin above V latch (2 V typical) and permanently
disable pulses. The V CC needs to be cycled down below
6.5 V typically to reset the controller.
?
V out
V CC
V bulk
+
+
?
V ref latch
20 m s
Filter
to Permanent Latch
Q1
R upper
?
NTC
R lower
BO
SW
+
+
?
V refBO
20 m s
Filter
BO_OK
I BO
To PFC Delay
High Level for 50 ms After V CC On
Figure 29. Adding a Comparator on the BO Pin Offers a Way to Latch ? Off the Controller
On Figure 29, Q1 is blocked and does not bother the BO
measurement as long as the NTC and the optocoupler are not
activated. As soon as the secondary optocoupler senses an
The High ? Voltage Driver
Figure 30 shows the internal architecture of the
high ? voltage section. The device incorporates an upper
OVP condition, or the NTC reacts to a high ambient
temperature, Q1 base is brought to ground and the BO Pin
goes up, permanently latching off the controller.
UVLO circuitry that makes sure enough V gs is available for
the upper side MOSFET. The V CC for floating driver section
http://onsemi.com
14
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