参数资料
型号: NCP1395ADR2G
厂商: ON Semiconductor
文件页数: 19/27页
文件大小: 0K
描述: IC REG CTRLR PWM VM 16-SOIC
标准包装: 1
PWM 型: 电压模式
输出数: 2
频率 - 最大: 1.11MHz
占空比: 52%
电源电压: 9.3 V ~ 20 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 16-SOIC(0.154",3.90mm 宽)
包装: 剪切带 (CT)
其它名称: NCP1395ADR2GOSCT
NCP1395A/B
1 ires1 2 vout
20.0
10.0
0
? 10.0
1
? 20.0
177
175
173
171
169
SS Action
Target is
reached
Ires
Vout
2
200u
600u
1.00m
time in seconds
1.40m
1.80m
Figure 42. Soft ? Start Behavior
Please note that the soft ? start will be activated in the
following conditions:
? A startup sequence
? During auto ? recovery burst mode
? A brown ? out recovery
? A temperature shutdown recovery
The fast fault input undergoes a special treatment. Since
we want to implement skip cycle through the fast fault
input on the NCP1395A, we cannot activate the soft ? start
every time the feedback pin stops the operations in low
power mode. Therefore, when the fast fault pin is released,
Figure 43. A Typical Startup Sequence on an LLC
Converter
no soft ? start occurs to offer the best skip cycle behavior.
However, it is very possible to combine skip cycle and true
fast fault input, e.g. via ORing diodes driving pin 13. In that
case, if a signal maintains the fast fault input high long
enough to bring the feedback level down (that is to say
below 0.6 V) since the output voltage starts to fall down,
then the soft ? start is activated after the release of the pin.
In the B version tailored to operate from an auxiliary
12 V power supply, the soft ? start is always activated upon
the fast fault input release, whatever the feedback
condition is.
http://onsemi.com
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