参数资料
型号: NCP1523BFCT2G
厂商: ON Semiconductor
文件页数: 13/16页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ 8FLIPCHIP
标准包装: 3,000
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 0.9 V ~ 3.3 V
输入电压: 2.7 V ~ 5.5 V
PWM 型: 电压模式
频率 - 开关: 3MHz
电流 - 输出: 600mA
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-WFBGA,FCBGA
包装: 带卷 (TR)
供应商设备封装: 8-覆晶
NCP1523
OPERATION DESCRIPTION
Overview
The NCP1523 uses a constant frequency, voltage mode
step?down architecture. Both the main (P?channel
MOSFET) and synchronous (N?channel MOSFET)
switches are internal.
It delivers a constant voltage from either a single Li?Ion
or three cell NiMH/NiCd battery to portable devices such as
cell phones and PDA. The output voltage is sets by external
resistor divider and has a voltage tolerance of ± 3% with 90%
efficiency or better. The NCP1523 sources up to 600 mA
depending on external components chosen.
Additional features include soft?start, under voltage
protection, current overload protection, and thermal
shutdown protection. As shown in Figure 1, only six
external components are required for implementation. The
part uses an internal reference voltage of 0.6 V. It is
recommended to keep the part in shutdown until the input
voltage is 2.7 V or higher.
PWM Operating Mode: NCP1523 & NCP1523B
In this mode, the output voltage of the NCP1523 is
regulated by modulating the on?time pulse width of the
main switch Q1 at a fixed frequency of 3 MHz. The
switching of the PMOS Q1 is controlled by a flip?flop
driven by the internal oscillator and a comparator that
compares the error signal from an error amplifier with the
PWM ramp. At the beginning of each cycle, the main switch
Q1 is turned ON by the rising edge of the internal oscillator
clock. The inductor current ramps up until the sum of the
current sense signal and compensation ramp becomes higher
than the amplifier ’s error voltage. Once this has occurred,
the PWM comparator resets the flip?flop, Q1 is turned OFF
and the synchronous switch Q2 is turned ON. Q2 replaces
the external Schottky diode to reduce the conduction loss
and improve the efficiency. To avoid overall power loss, a
certain amount of dead time is introduced to ensure Q1 is
completely turned OFF before Q2 is being turned ON.
PFM Operating Mode at Light Load: NCP1523 Only
The NCP1523FCT2G works with two mode of operation
PWM/PFM depending on the current required. Under light
load conditions, the NCP1523FCT2G enters in low current
PFM mode of operation to reduce power consumption (I Q =
60 m A typ). The output regulation is implemented by pulse
frequency modulation. If the output voltage drops below the
threshold of PM comparator (typically V nom ?2%), a new
cycle will be initiated by the PM comparator to turn on the
switch Q1. Q1 remains ON until the peak inductor current
reaches 200 mA (nom). Then I LIM comparator goes high to
switch OFF Q1. After a short dead time delay, switch
rectifier Q2 is turn ON. The Negative current detector
(NCD) will detect when the inductor current drops below
zero and the output voltage decreases through discharging
the output capacitor. When the output voltage falls below the
threshold of the PFM comparator, a new cycle starts
PWM Operating Mode at Light Load: NCP1523B Only
At low light conditions, NCP1523BFCT2G works also in
PWM mode offering very good load transient results from
light load to full charge. When there is no load on the output,
the PMOS Q1 remains ON during a small pulse according
to the flip?flop driven by the internal oscillator and the error
comparator. If the drop between input and output voltage is
higher than 4.0 V, the structure reaches the minimum ON
time (T ONmin ). In this particular case, the part can not supply
correctly the desired output voltage and shows a small
output voltage deregulation. For an output voltage
configured to 0.9 V, 4.9 V is the maximum input voltage
which guarantees the correct output value; for an output set
to 1.5 V, the maximum input is 5.5 V.
Cycle?by?Cycle Current Limitation
From the block diagram (Figure 3), an I LIM comparator is
used to realize cycle?by?cycle current limit protection. The
comparator compares the SW pin voltage with the reference
voltage, which is biased by a constant current. If the inductor
current reaches the limit, the I LIM comparator detects the
SW voltage falling below the reference voltage and releases
the signal to turn off the switch Q1. The cycle?by?cycle
current limit is set at 1200 mA (nom).
Soft Start
The NCP1523 uses soft?start to limit the inrush current
when the device is initially powered up or enabled.
Soft?start is implemented by gradually increasing the
reference voltage until it reaches the full reference voltage.
During startup, a pulsed current source charges the internal
soft?start capacitor to provide gradually increasing
reference voltage. When the voltage across the capacitor
ramps up to the nominal reference voltage, the pulsed
current source will be switched off and the reference voltage
will switch to the regular reference voltage.
Shutdown Mode
When a voltage less than 0.4 V is applied on the EN pin,
the NCP1523 will be disabled. In shutdown mode, the
internal reference, oscillator and most of the control
circuitries are turned off. Therefore, the typical current
consumption will be 0.3 m A (typical value). Applying a
voltage above 1.2 V to EN pin will enable the device for
normal operation. The device will go through soft?start to
normal operation. EN pin should be activated after the input
voltage is applied.
Thermal Shutdown
Internal Thermal Shutdown circuitry is provided to
protect the integrated circuit in the event that the maximum
junction Temperature is exceeded. If the junction temperature
exceeds 160 _ C, the device shuts down. In this mode switch
Q1 and Q2 and the control circuits are all turned off. The
device restarts in soft start after the temperature drops below
135 ° C. This feature is provided to prevent catastrophic
failures from accidental device overheating.
immediately.
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