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| 型号： | NCP1575DG |
| 厂商： | ON Semiconductor |
| 文件页数： | 12/16页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM 8-SOIC |
| 产品变化通告： | Product Obsolescence 08/Apr/2011 |
| 标准包装： | 98 |
| PWM 型： | 电流/电压模式，V²? |
| 输出数： | 1 |
| 频率 - 最大： | 320kHz |
| 电源电压： | 9 V ~ 20 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | 0°C ~ 125°C |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 包装： | 管件 |
NCP1575
D VOUT + D IOUT ESL ) ESR ) tTR
LIN +
Series Resistance (ESR), and Equivalent Series Inductance
(ESL). For best transient response, a combination of low
value/high frequency and bulk capacitors placed close to the
load will be required.
In order to determine the number of output capacitors the
maximum voltage transient allowed during load transitions
has to be specified. The output capacitors must hold the
output voltage within these limits since the inductor current
can not change with the required slew rate. The output
capacitors must therefore have a very low ESL and ESR.
The voltage change during the load current transient is:
D t COUT
where:
D I OUT / D t = load current slew rate;
D I OUT = load transient;
D t = load transient duration time;
ESL = Maximum allowable ESL including capacitors,
circuit traces, and vias;
ESR = Maximum allowable ESR including capacitors
and circuit traces;
t TR = output voltage transient response time.
The designer has to independently assign values for the
change in output voltage due to ESR, ESL, and output
capacitor discharging or charging. Empirical data indicates
that most of the output voltage change (droop or spike
depending on the load current transition) results from the
total output capacitor ESR.
The maximum allowable ESR can then be determined
according to the formula:
Selection of the Input Inductor
A common requirement is that the buck controller must
not disturb the input voltage. One method of achieving this
is by using an input inductor and a bypass capacitor. The
input inductor isolates the supply from the noise generated
in the switching portion of the buck regulator and also limits
the inrush current into the input capacitors upon power up.
The inductor ’s limiting effect on the input current slew rate
becomes increasingly beneficial during load transients. The
worst case is when the load changes from no load to full load
(load step), a condition under which the highest voltage
change across the input capacitors is also seen by the input
inductor. The inductor successfully blocks the ripple current
while placing the transient current requirements on the input
bypass capacitor bank, which has to initially support the
sudden load change.
The minimum inductance value for the input inductor is
therefore:
D V
(dI dt)MAX
where:
L IN = input inductor value;
D V = voltage seen by the input inductor during a full load
swing;
(dI/dt) MAX = maximum allowable input current slew rate.
The designer must select the LC filter pole frequency so
that at least 40 dB attenuation is obtained at the regulator
switching frequency. The LC filter is a double?pole network
with a slope of ?2.0, a roll?off rate of ?40 dB/dec, and a
corner frequency:
ESRMAX +
D VESR
D IOUT
fC +
2 p
1
LC
where:
D V ESR = change in output voltage due to ESR (assigned
by the designer)
Once the maximum allowable ESR is determined, the
number of output capacitors can be found by using the
formula:
where:
L = input inductor;
C = input capacitor(s).
Selection of the Output Inductor
There are many factors to consider when choosing the
output inductor. Maximum load current, core and winding
Number of capacitors +
ESRCAP
ESRMAX
losses, ripple current, short circuit current, saturation
characteristics, component height and cost are all variables
where:
ESR CAP = maximum ESR per capacitor (specified in
manufacturer ’s data sheet).
ESR MAX = maximum allowable ESR.
The actual output voltage deviation due to ESR can then
be verified and compared to the value assigned by the
designer:
D VESR + D IOUT ESRMAX
Similarly, the maximum allowable ESL is calculated from
the following formula:
that the designer should consider. However, the most
important consideration may be the effect inductor value has
on transient response.
The amount of overshoot or undershoot exhibited during
a current transient is defined as the product of the current
step and the output filter capacitor ESR. Choosing the
inductor value appropriately can minimize the amount of
energy that must be transferred from the inductor to the
capacitor or vice?versa. In the subsequent paragraphs, we
will determine the minimum value of inductance required
for our system and consider the trade?off of ripple current
ESLMAX +
D VESL
D I
D t
vs. transient response.
http://onsemi.com
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