参数资料
型号: NCP1606BPG
厂商: ON Semiconductor
文件页数: 11/22页
文件大小: 245K
描述: IC CTRLR PWR FACTOR 0.5V 8-DIP
产品变化通告: Product Obsolescence 05/Oct/2010
标准包装: 50
模式: 临界传导(CRM)
电流 - 启动: 20µA
电源电压: 10.3 V ~ 20 V
工作温度: -40°C ~ 125°C
安装类型: 通孔
封装/外壳: 8-DIP(0.300",7.62mm)
供应商设备封装: 8-PDIP
包装: 管件
NCP1606
http://onsemi.com
11
When the switch is closed, the inductor current increases
linearly to its peak value. When the switch opens, the
inductor current linearly decreases to zero. At this point,
the drain voltage of the switch (V
d
) is essentially floating
and begins to drop. If the next switching cycle does not
start, then the voltage will ring with a dampened frequency
around V
in
. A simple derivation of equations (such as found
in AND8123), leads to the result that good power factor
correction in CRM operation is achieved when the on time
is constant across an ac cycle and is equal to:
t
on
+
2 @ P
OUT
@ L
h @ Vac
RMS
2
(eq. 1)
A simple plot of this switching over an ac line cycle is
illustrated in Figure 24. The off time varies based on the
instantaneous line voltage, but the on time is kept constant.
This naturally causes the peak inductor current (I
Lpk
) to
follow the ac line voltage.
The NCP1606 represents an ideal method to implement
this constant on time CRM control in a cost effective and
robust solution. The device incorporates an accurate
regulation circuit, a low power startup circuit, and
advanced protection features.
Figure 24. Inductor Waveform During CRM Operation
ON
OFF
MOSFET
I
in
(t)
I
L
(t)
V
in
(t)
V
inpk
I
Lpk
I
inpk
ERROR AMPLIFIER REGULATION
The NCP1606 is configured to regulate the boost output
voltage based on its built in error amplifier (EA). The error
amplifiers negative terminal is pinned out to FB, the
positive terminal is tied to a 2.5 V ?1.6% reference, and the
output is pinned out to Control (Figure 25).
Figure 25. Error Amplifier and On Time Regulation Circuits
FB
Control
+

EA
2.5 V
PWM BLOCK
V
CONTROL
R
OUT2
R
OUT1
C
COMP
t
PWM
t
ON(max)
V
OUT
t
ON
V
EAL
V
EAH
Slope +
Ct
I
CHARGE
V
CONTROL
A resistor divider from the boost output to the input of the
EA sets the FB level. If the output voltage is too low, then
the FB level will drop and the EA will cause the control
voltage to increase. This increases the on time of the driver,
which increases the power delivered and brings the output
back into regulation. Alternatively, if the output voltage
(and hence FB voltage) is too high, then the control level
decreases and the driver on times are shortened. In this way,
the circuit regulates the output voltage (V
OUT
) so that the
V
OUT
 portion that is applied to FB through the resistor
divider R
OUT1
 and R
OUT2
 is equal to the internal reference
(2.5 V). The output voltage can then be easily set according
to the following equation:
V
OUT
+ 2.5 V @
R
OUT1
) R
OUT2
R
OUT2
(eq. 2)
A compensation network is placed between the FB and
Control pins to reduce the speed at which the EA responds
to changes in the boost output. This is necessary due to the
nature of an active PFC circuit. The PFC stage absorbs a
sinusoidal current from a sinusoidal line voltage. Hence,
the converter provides the load with a power that matches
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