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参数资料
| 型号： | NCP1606BPG |
| 厂商： | ON Semiconductor |
| 文件页数： | 12/22页 |
| 文件大小： | 245K |
| 描述： | IC CTRLR PWR FACTOR 0.5V 8-DIP |
| 产品变化通告： | Product Obsolescence 05/Oct/2010 |
| 标准包装： | 50 |
| 模式： | 临界传导（CRM） |
| 电流 - 启动： | 20µA |
| 电源电压： | 10.3 V ~ 20 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 通孔 |
| 封装/外壳： | 8-DIP（0.300"，7.62mm） |
| 供应商设备封装： | 8-PDIP |
| 包装： | 管件 |
NCP1606
http://onsemi.com
12
the average demand only. Therefore, the output capacitor
must absorb the difference between the delivered power
and the power consumed by the load. This means that when
the power fed to the load is lower than the demand, the
output capacitor discharges to compensate for the lack of
power. Alternatively, when the supplied power is higher
than that absorbed by the load, the output capacitor charges
to store the excess energy. The situation is depicted in
Figure 26.
Figure 26. Output Voltage Ripple for a Constant Output Power
V
OUT
P
OUT
P
IN
Iac
Vac
As a consequence, the output voltage exhibits a ripple at
a frequency of either 100 Hz (for 50 Hz mains such as in
Europe) or 120 Hz (for 60 Hz mains in the USA). This
ripple must not be taken into account by the regulation loop
because the error amplifiers output voltage must be kept
constant over a given ac line cycle for a proper shaping of
the line current. Due to this constraint, the regulation
bandwidth is typically set below 20 Hz. For a simple type 1
compensation network, only a capacitor is placed between
FB and Control (see Figure 1). In this configuration, the
capacitor necessary to attenuate the bulk voltage ripple is
given by:
C
COMP
+
10
G
20
4 @ p f
line
@ R
OUT1
(eq. 3)
where G is the attenuation level in dB (commonly 60 dB)
ON TIME SEQUENCE
Since the NCP1606 is designed to control a CRM boost
converter, its switching pattern must accommodate
constant on times and variable off times. The Controller
generates the on time via an external capacitor connected
to pin 3 (Ct). A current source charges this capacitor to a
level determined by the Control pin voltage. Specifically,
Ct is charged to V
CONTROL
minus the V
EAL
offset
(typically 2.1 V). Once this level is exceeded, the drive is
turned off (Figure 27).
Figure 27. On Time Generation
Control
Ct
+
PWM
+
DRV
I
CHARGE
t
ON
V
EAL
V
CONTROL
V
EAL
t
ON
V
Ct
V
Ct(off)
V
DD
DRV
V
CONTROL
Since V
CONTROL
varies with the RMS line level and
output load, this naturally satisfies equation 1. And if the
values of compensation components are sufficient to filter
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