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| 型号： | NCP1654BD133R2G |
| 厂商： | ON Semiconductor |
| 文件页数： | 18/23页 |
| 文件大小： | 228K |
| 描述： | IC PFC CCM 133KHZ 8-SOIC |
| 标准包装： | 2,500 |
| 模式： | 连续导电（CCM） |
| 频率 - 开关： | 120kHz ~ 146kHz |
| 电流 - 启动： | 75µA |
| 电源电压： | 9 V ~ 20 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOICN |
| 包装： | 带卷 (TR) |
| 其它名称： | NCP1654BD133R2G-ND NCP1654BD133R2GOSTR |
NCP1654
http://onsemi.com
18
Soft Start
The block diagram and timing diagram of soft start
function are as shown in Figure 42 and Figure 43. The
device provides no output (or no duty ratio) when the
V
control
is lower than V
CONTROL(min)
. V
control
is pulled low
when:
" Brownout, or
" Undervoltage Protection
When the IC recovers from one of the following
conditions; Undervoltage Lockout, Brownout or
Undervoltage Protection, the 200 mA current source block
keeps off. Hence only the Operating Transconductance
Amplifier (OTA) raises the V
control
. And V
control
rises
slowly. This is to obtain a slow increasing duty cycle and
hence reduce the voltage and current stress on the
MOSFET. A softstart operation is obtained.
Figure 42. Soft Start Block Diagram
+
-
+
-
95%
V
REF
V
REF
OTA
Vfb
6
5
V
control
V
out
Low Detect
200 mA
Vdd
?0 mA
Q
Q
S
R
Bias
Vdd
Off
UVP
UVLO
BO
UVLO
BO
95% V
REF
Figure 43. Soft Start Timing Diagram
Period I
Period II
UVLO, BO, or UVP
Vdd
Vdd Rising
Vfb
Set
Reset
Q
Vout Low Detect
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