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| 型号： | NCP1910B65DWR2G |
| 厂商： | ON Semiconductor |
| 文件页数： | 30/37页 |
| 文件大小： | 0K |
| 描述： | IC COMBO CTLR ATX 24-SOIC |
| 标准包装： | 1 |
| 模式： | 连续导电（CCM） |
| 频率 - 开关： | 245 kHz |
| 电流 - 启动： | 100µA |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-SOIC（0.295"，7.50mm 宽）23 引线 |
| 供应商设备封装： | 24-SOIC W |
| 包装： | 标准包装 |
| 其它名称： | NCP1910B65DWR2GOSDKR |
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NCP1910
PFC Abnormal
The PFC abnormal is detected by sensing V CTRL level.
When V CTRL stays at V CTRL(max) , or lower than V CTRL(min)
– 0.1 V, for more than t PFCabnormal , PFC turns off first. After
t DEL2 , LLC shuts down. It is latches off protection.
The main purpose of this feature is to avoid LLC from
operating without correct operation of PFC stage.
LLC Section
Current Controlled Oscillator (CCO)
The current controlled oscillator features a high ? speed
circuitry allowing operation from 50 kHz up to 1 MHz.
VDD
However, as a D ? flip ? flop that creates division ? by ? two
internally provides two outputs (A and B in Figure 57), the
final effective signal on LLC driver outputs (ML and MU)
switches between 25 kHz and 500 kHz. The CCO is
configured in such a way that if the current that flows out
from the R t pin increases, the switching frequency also goes
up.
R max
R SS
R t
R min
V Rt
C t
I DT
+
-
V Ctmax
S
D
Clk
R
Q
Q
B
A
for MU
for ML
Feedback
opto-coupler
C SS
SS
Grand Reset
CS/FF > V CS1
LLC_BO
t DEL2 elapsed
LLCenable
Grand Reset
Latch
Q
Q
S
S
Q
Q
Grand Reset
Disable LLC ML and MU
Grand Reset
V SS_RST
R
R
LLC_PG
Figure 57. The Current Controlled Oscillator Architecture and Configuration
The internal timing capacitor C t is charged by current
which is proportional to the current flowing out from the
R t pin. The discharging current i DT is applied when voltage
on this capacitor reaches V Ctmax . The output drivers are
disabled during discharge period so the dead time length is
given by the discharge current sink capability. Discharge
sink is disabled when voltage on the timing capacitor
reaches zero and charging cycle starts again. C t is grounded
to disable the oscillator when either of “turn ? off LLC”
For the resonant applications, it is necessary to adjust
minimum operating frequency with high accuracy. The
designer also needs to limit maximum operating and startup
frequency. All these parameters can be adjusted by using
external components connected to the R t pin as shown in
Figure 57.
The following approximate relationships hold for the
minimum, maximum and startup frequency respectively:
signals arrives.
http://onsemi.com
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