参数资料
型号: NCP302LSN09T1G
厂商: ON Semiconductor
文件页数: 21/26页
文件大小: 0K
描述: IC VOLT DETECT CMOS 0.9V 5TSOP
标准包装: 1
类型: 简单复位/加电复位
监视电压数目: 1
输出: 推挽式,图腾柱
复位: 低有效
复位超时: 可调节/可选择
电压 - 阀值: 0.9V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 6-TSOP(0.059",1.50mm 宽)5 引线
供应商设备封装: 5-TSOP
包装: 剪切带 (CT)
其它名称: NCP302LSN09T1GOSCT
NCP302, NCP303
5
C D
Power Supply 1
(System Core)
R1 is Optional C D Pin Pullup
2 Input
R1
NCP302L
Series
C D
3 GND
1
Reset Output
V P
* R P
*Required for
NCP303
To MCU or
Logic Circuitry
3.3 V Power Supply 2
(I/O Subsystem)
2
Input
NCP301
LSN30T1
1
Reset Output
5.0 V Power Supply 3
3
GND
(Peripheral Subsystem)
2
Input
NCP301
LSN45T1
1
Reset Output
Power Supply 1
Power Supply 2
Power Supply 3
V IN
0V
0V
0V
3
GND
C D Pin
V IN
V TCD
0V
NCP302L
RESET Output
0V
Note: V TCD   0.675 * V IN
t D2
t D2
t D2
t D2
Figure 46. Multi ? Rail Supply Undervoltage Monitor with Power Good
This circuit monitors multiple power supply rails for
undervoltage conditions. If any of the three power supplies
are in an undervoltage condition, the NCP302 reset output
will be immediately set to an active low level. All three
power supplies must be above their minimum voltage levels
for the NCP302 reset output to generate a “Power Good”
level (Reset Output = Power Supply 1 or V P ).
Optionally, R1 may be added to provide a smaller
effective C D pin pullup resistance, (R D ’), where
R D ’ = R1 || R D , with R D (internal C D pin pullup resistance)
approximately equal to 1.0 M W , and R1 > 5 k W . If R1 << R D ,
then R1 also can decrease the reset output delay time (t D2 )
variance over the operating temperature range.
The Power Good signal time delay (t D2 ) can be estimated
by: t D2 ≈ R D * C D , with R D in Ohms, and C D in Farads. If
R1 is installed, then R D ’ is substituted for R D . R P is added
only if using the NCP303 to replace the NCP302. This
allows the Reset Output to be pulled up to V P , which can be
the Power Supply 1 or an independent power supply rail.
http://onsemi.com
21
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