参数资料
| 型号： | NCP3125ADR2G |
| 厂商： | ON Semiconductor |
| 文件页数： | 2/22页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 4A 8SOIC |
| 标准包装： | 1 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.8 V ~ 5 V |
| 输入电压： | 4.5 V ~ 13.2 V |
| PWM 型： | 电压模式 |
| 频率 - 开关： | 350kHz |
| 电流 - 输出： | 4A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 包装： | 标准包装 |
| 供应商设备封装： | 8-SOICN |
| 其它名称： | NCP3125ADR2GOSDKR |
NCP3125
CIRCUIT DESCRIPTION
+
?
BST
VIN
?
UVLO
+
10 m A
POR
VREF
Fault
Latch
OLP
+
VOCTH
+
?
FB
0.8 V
?
+
?
PWM
Comp
R
PWM
OUT
Q
Fault
COMP
S
Counter
VSW
Clock
Count
Latch
+
DtoA
?
+
Ramp
OSC
&
Logic
?
+
?
2V
VCC
VREG
OSC
+
0.7 V
?
Fault
AGND
Figure 3. NCP3125 Block Diagram
ISET
PGND
Table 1. PIN DESCRIPTION
Pin
1
2
3
4
5
6
7
8
Pin Name
PGND
FB
COMP
AGND
BST
VIN
ISET
VSW
Description
The PGND pin is the high current ground pin for the low ? side MOSFET and the drivers. The pin should be
soldered to a large copper area to reduce thermal resistance.
Inverting input to the Operational Transconductance Amplifier (OTA). The FB pin in conjunction with the
external compensation, serves to stabilize and achieve the desired output voltage with voltage mode
control.
COMP pin is used to compensate the OTA which stabilizes the operation of the converter stage. Place
compensation components as close to the converter as possible.
The AGND pin serves as small ? signal ground. All small ? signal ground paths should connect to the AGND
pin at a single point, avoiding any high current ground returns.
Supply rail for the floating top gate driver. To form a boost circuit, use an external diode to bring the desired
input voltage to this pin (cathode connected to BST pin). Connect a capacitor (CBST) between this pin and
the VSW pin. Typical values for CBST range from 1 nF to 10 nF. Ensure that CBST is placed near the IC.
The VIN pin powers the internal control circuitry and is monitored by an undervoltage comparator. The VIN
pin is also connected to the internal power NMOSFET switches. The VIN pin has high dI/dt edges and must
be decoupled to PGND pin close to the pin of the device.
Current set pin and bottom gate MOSFET driver. Place a resistor to ground to set the current limit of the
converter.
The VSW pin is the connection of the drain and source of the internal N ? MOSFETs. The VSW pin swings
from V IN when the high side switch is on to small negative voltages when the low side switch is on with high
dV/dt transitions.
http://onsemi.com
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