参数资料
型号: NCP3418BMNR2G
厂商: ON Semiconductor
文件页数: 6/8页
文件大小: 0K
描述: IC MOSFET DRIVER DUAL 12V 10-DFN
产品变化通告: Product Discontinuation 01/Oct/2008
标准包装: 3,000
配置: 高端和低端,同步
输入类型: PWM
延迟时间: 30ns
电流 - 峰: 1.5A
配置数: 1
输出数: 2
高端电压 - 最大(自引导启动): 30V
电源电压: 4.6 V ~ 13.2 V
工作温度: 0°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 10-VFDFN 裸露焊盘
供应商设备封装: 10-DFN(3x3)
包装: 带卷 (TR)
NCP3418B
Safety Timer and Overlap Protection Circuit
It is very important that MOSFETs in a synchronous buck
regulator do not both conduct at the same time. Excessive
shoot?through or cross conduction can damage the
MOSFETs, and even a small amount of cross conduction
will cause a decrease in the power conversion efficiency.
The NCP3418B prevents cross conduction by monitoring
the status of the external mosfets and applying the
appropriate amount of “dead?time” or the time between the
turn off of one MOSFET and the turn on of the other
MOSFET.
When the PWM input pin goes high, DRVL will go low
after a propagation delay (tpdlDRVL). The time it takes for
the low?side MOSFET to turn off (tfDRVL) is dependent on
the total charge on the low?side MOSFET gate. The
NCP3418B monitors the gate voltage of both MOSFETs and
the switchnode voltage to determine the conduction status of
the MOSFETs. Once the low?side MOSFET is turned off an
internal timer will delay (tpdhDRVH) the turn on of the
Input Pins
The PWM input and the Output Disable pins of the
NCP3418B have internal protection for Electro Static
Discharge (ESD), but in normal operation they present a
relatively high input impedance. If the PWM controller does
not have internal pull?down resistors, they should be added
externally to ensure that the driver outputs do not go high
before the controller has reached its under voltage lockout
threshold. The NCP5381 controller does include a passive
internal pull?down resistor on the drive?on output pin.
Bootstrap Circuit
The bootstrap circuit uses a charge storage capacitor
(C BST ) and the internal (or an external) diode. Selection of
these components can be done after the high?side MOSFET
has been chosen. The bootstrap capacitor must have a
voltage rating that is able to withstand twice the maximum
supply voltage. A minimum 50 V rating is recommended.
The capacitance is determined using the following equation:
high?side MOSFET
Likewise, when the PWM input pin goes low, DRVH will
CBST +
QGATE
D VBST
go low after the propagation delay (tpdDRVH). The time to
turn off the high?side MOSFET (tfDRVH) is dependent on
the total gate charge of the high?side MOSFET. A timer will
be triggered once the high?side mosfet has stopped
conducting, to delay (tpdhDRVL) the turn on of the
low?side MOSFET
Power Supply Decoupling
The NCP3418B can source and sink relatively large
currents to the gate pins of the external MOSFETs. In order
to maintain a constant and stable supply voltage (Vcc) a low
ESR capacitor should be placed near the power and ground
pins. A 1 m F to 4.7 m F multi layer ceramic capacitor (MLCC)
is usually sufficient.
12 V
NCP3418
where Q GATE is the total gate charge of the high?side
MOSFET, and D V BST is the voltage droop allowed on the
high?side MOSFET drive. For example, a NTD60N03 has
a total gate charge of about 30 nC. For an allowed droop of
300 mV, the required bootstrap capacitance is 100 nF. A
good quality ceramic capacitor should be used.
The bootstrap diode must be rated to withstand the
maximum supply voltage plus any peak ringing voltages
that may be present on SW. The average forward current can
be estimated by:
IF(AVG) + QGATE fMAX
where f MAX is the maximum switching frequency of the
controller. The peak surge current rating should be checked
in?circuit, since this is dependent on the source impedance
of the 12 V supply and the ESR of C BST.
12 V
Output Enable
PWM in
4
3
2
Vcc
OD
IN
BST
DRVH
SW
DRVL
PGND
1
8
7
5
6
Vout
Figure 4. NCP3418 Example Circuit
http://onsemi.com
6
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