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参数资料
| 型号： | NCP5021MUTXG |
| 厂商： | ON Semiconductor |
| 文件页数： | 14/17页 |
| 文件大小： | 0K |
| 描述： | IC WHITE LED DVR HV AMB 16-UQFN |
| 产品变化通告： | Product Obsolescence 07/Jul/2010 |
| 标准包装： | 3,000 |
| 拓扑： | PWM，升压（升压） |
| 输出数： | 1 |
| 内部驱动器： | 是 |
| 类型 - 主要： | 背光，闪灯/白光 |
| 类型 - 次要： | 白色 LED |
| 频率： | 1.13MHz ~ 1.47MHz |
| 电源电压： | 2.7 V ~ 5.5 V |
| 输出电压： | 32V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-UFQFN 裸露焊盘 |
| 供应商设备封装： | 16-UQFN-EP（3x3） |
| 包装： | 带卷 (TR) |
| 工作温度： | -40°C ~ 85°C |
NCP5021
U3
SFH5711
VSB
4
+VBat
VSB
GAIN
Log
4
R2
220k
AMBS
5
R
R/2
GND
1 2
GND
R1 22k
C1
2.2uF
U1
ANALOG
MONITORING
R/4
R
GND
I2C
R/2
R
2R
4R
Figure 12. Basic Photo Sense Input Circuit
Since several type of photo sensor can be used in the final application, provisions have been taken into account to dynamically
adjust the gain of the photo current. Such capability is carried out by the internal register loaded through the I2C port.
Table 13. PHGAIN[0..7]
B7
VSD
B6
0
B5
0
B4
PHG5
B3
PHG4
B2
PHG3
B1
PHG2
B0
PHG1
RESET
0
0
0
0
0
0
0
0
Bit [B7] : Photo sense VSD bias control
Bit [B7] : B7 = 0 3 VSD disconnected, photo sense function de ? activated
Bit [B7] : B7 = 1 3 VSD connected, photo sense function activated
Bits [B6:B5] : RFU
Bits [B4:B0] : Photo sensor gain adjust
When the photo sense returns a lower ambient light level in comparison to the maximum level set up by the user, the I ? LED
decreases with a timing defined by an I2C command. Such a timing is derived from the Low Frequency clock and selected
by the PHTIM register (see Figure 13).
Table 14. PHCLK[0..7]
B7
PHTT
B6
0
B5
PHT6
B4
PHT5
B3
PHT4
B2
PHT3
B1
PHT2
B0
PHT1
RESET
0
0
0
0
0
0
0
0
Bits [B7] : RFU
Bits [B6] : RFU
Bits [B5:B0] :
PHT1 = Photo sense clock = 25 Hz
PHT2 = Photo sense clock = 12 Hz
PHT3 = Photo sense clock = 6 Hz
PHT4 = Photo sense clock = 3 Hz
PHT5 = Photo sense clock = 1.5 Hz
PHT6 = Photo sense clock = 0.7 MHz
PHTT = Photo sense clock = 1.7 MHz
3 T = 40 ms/step
3 T = 80 ms/step
3 T =160 ms/step
3 T = 320 ms/step
3 T = 640 ms/step
3 T = 1280 ms/step
3 T = 560 ns/step 3 reserved for test purpose
NOTE:
The bits cannot be combined to generate a different timing.
http://onsemi.com
14
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