参数资料
型号: NCP5318FTR2
厂商: ON Semiconductor
文件页数: 15/32页
文件大小: 0K
描述: IC CTLR CPU 2/3/4 PHASE 32-LQFP
产品变化通告: Product Obsolescence 11/Feb/2009
标准包装: 2,000
应用: 控制器,CPU
输入电压: 9.5 V ~ 13.2 V
输出数: 4
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 32-LQFP
供应商设备封装: 32-LQFP(7x7)
包装: 带卷 (TR)
NCP5318
APPLICATIONS INFORMATION
Overview
The NCP5318 is a multiphase, synchronous buck
controller using the Enhanced V 2 topology which combines
the fast transient response of the original V 2 topology with
the load current sharing characteristic of peak current ? mode
control. The NCP5318 can be operated as an interleaved
two/three/four ? phase controller. Differential current
sensing is incorporated in order to more easily achieve
effective current sharing. Converter output is regulated to a
voltage corresponding to the logic states at six digital inputs.
The NCP5318 incorporates a Power Good (PWRGD)
function, providing integrated fault monitoring and
sequencing that simplifies design, minimizes circuit board
area, and reduces overall system cost.
Fixed Frequency Multi ? Phase Control
In a multi ? phase buck converter, multiple, synchronously
rectified, buck power stages are connected in parallel and are
energized at a common frequency but with staggered
phasing (interleaving). Each stage carries only part of the
total output current. In four ? phase mode, each phase
oscillator is delayed 360/4 ? or 90 ? degrees from that of the
previous phase. Likewise, for other phase counts, each phase
oscillator is delayed 360/N degrees from that of the previous
phase, where N is the number of phases.
Advantages of a multiphase converter over a single ? phase
converter include a better heat distribution and decreased
input and output ripple currents. Breaking up heat into a
greater number of smaller amounts, reduces PC Board
thermal stress. Multiple phases also permits phase
inductance to be higher than used in a single ? phase
converter capable of equal transient response, with
correspondingly lower phase ripple current and I 2 R losses.
In addition to the higher efficiency, input capacitor current
appears even lower because of the cancellation achieved by
the summation of individual, phase shifted, ripple currents.
This often allows the use of fewer input capacitors without
exceeding the capacitor RMS current rating. Also due to the
x = 1, 2, 3 or 4
decrease in phase ripple current, output di/dt change from
positive to negative during switching is reduced. This
reduction of output di/dt change decreases the output
capacitor ESL component of output ripple voltage ? often
allowing a reduction in the number of ceramic output
capacitors.
Because the inductors are always connected between the
output and some low impedance (either the input supply or
ground), the effective inductance value seen at the output is
the value of all inductors connected in parallel (the value of
a single inductor divided by the number of phases).
Multiphase output current ramp ? up (+di/dt) or ramp ? down
( ? di/dt) exhibits finer granularity due to the summation of
the smaller individual phase di/dt produced by the larger
individual inductors. Within one switching cycle, however,
total converter di/dt can sum to the same di/dt as a power
stage with a single inductor of the same effective value.
Enhanced V 2 Control
Enhanced V 2 control measures and adjusts the output
current in each phase while simultaneously adjusting the
current of all phases to maintain the correct output voltage.
Enhanced V 2 responds to output voltage disturbances by the
combined effect of two mechanisms. The first mechanism
includes the response of the Error Amplifier, and is
responsible for maintaining the DC accuracy of the output
voltage setting. Depending on the frequency compensation
set by the amplifier ’s external components, the Error
Amplifier response begins to change the PWM duty cycle
within one to two cycles. The second mechanism is the direct
coupling of converter output voltage to all non ? inverting
PWM comparator inputs, which dominates PWM response
at frequencies above the unity ? gain crossover frequency of
the compensated Error Amplifier. A rapid increase in load
current that decreases converter output voltage immediately
extends the duty cycle of any phase already on, and will
typically increase the duty cycle of several of the following
phases for one cycle.
SWNODE
Lx
RLx
RSx
CSxP
+
CSA
?
COx
CSxN
V FFB
Internal Ramp
DAC
Out
V OUT
(V CORE )
+
+
V FB
COMP
“Fast ? Feedback”
Connection
?
E.A.
+
Channel
Startup
Offset
+
?
PWM
COMP
To PWM Latch Reset
Figure 17. Enhanced V 2 Control Employing Resistive Current Sensing and Internal Ramp
http://onsemi.com
15
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