参数资料
型号: NCP5318FTR2
厂商: ON Semiconductor
文件页数: 7/32页
文件大小: 0K
描述: IC CTLR CPU 2/3/4 PHASE 32-LQFP
产品变化通告: Product Obsolescence 11/Feb/2009
标准包装: 2,000
应用: 控制器,CPU
输入电压: 9.5 V ~ 13.2 V
输出数: 4
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 32-LQFP
供应商设备封装: 32-LQFP(7x7)
包装: 带卷 (TR)
NCP5318
ELECTRICAL CHARACTERISTICS (continued) (0 ° C < T A < 70 ° C; V CC = 12 V; C GATEx = 100 pF, C COMP = 0.01 m F,
C SS = 0.1 m F, C VCC = 0.1 m F, R ROSC = 95.3 k W , V(I LIM ) = 1.0 V, DAC Code 010100; unless otherwise noted)
Characteristic
Test Conditions
Min
Typ
Max
Unit
VID Inputs
SGND Bias Current
SGND Voltage Compliance Range
SGND < 300 mV, All DAC Codes
?
10
? 200
20
?
40
300
m A
mV
Power Good
Upper Threshold Offset
Lower Threshold Ratio
Time to Assert PWRGD
Time to De ? assert PWRGD
Output Low Voltage
Offset from the No Load Set Point Voltage
PWRLS Voltage / No Load Set Point Volt-
age
Delay from V OUT in Range to PWRGD High
Delay from V OUT out of Range to PWRGD
Low
Voltage with Open Collector Pin Sinking
4 mA
85
0.475
1.0
0
0
97
0.505
2.0
1.0
180
115
0.525
4.0
4.0
400
mV
V/V
ms
m s
mV
Overvoltage Protection
OVP Threshold above VID
?
170
215
250
mV
Enable Input
Start Threshold
Stop Threshold
Hysteresis
Input Pull ? Up Voltage
Input Pull ? Up Resistance
Gates switching, SS high
Gates not switching, SS low
?
1.0 M W to GND
?
?
0.4
100
2.7
7.0
?
?
170
2.9
10
0.8
?
?
3.3
20
V
V
mV
V
k W
Error Amplifier
V FB Bias Current
COMP Source Current
COMP Sink Current
Transconductance
Open Loop DC Gain
Unity Gain Bandwidth
PSRR @ 1.0 kHz
COMP Max Voltage
COMP Min Voltage
?
COMP = 0.5 V to 2.0 V
?
(Note 2)
(Note 2)
C COMP = 30 pF (Note 2)
(Note 2)
V FB = 0 V
V FB = 1.6 V
?
40
40
1.1
72
?
?
2.4
?
0.1
70
70
1.3
80
4.0
60
2.9
80
1.0
100
100
1.5
?
?
?
?
150
m A
m A
m A
mmho
dB
MHz
dB
V
mV
PWM Comparators
Minimum Pulse Width
Transient Response Time
Channel Startup Offset
Artificial Ramp Amplitude
Measured from CSxP to GATEx,
V FB = CSxN = 0.5, COMP = 0.5 V,
60 mV step between CSxP and CSxN;
Measure at GATEx = 1.0 V (Note 2)
Measured from CSxN to GATEx,
COMP = 2.1 V, CSxP = CSxN = 0.5 V,
CSxN stepped from 1.2 V to 2.0 V (Note 2)
CSxP = CSxN = V FB = 0, Measure Vcomp
when GATEx switch high
50% duty cycle
?
?
0.35
?
40
40
0.62
175
100
60
0.75
?
ns
ns
V
mV
MOSFET Driver Enable (DRVON)
Output High
Output Low
Pull ? Down Resistance
DRVON floating
I = 100 m A
DRVON = 1.5 V, ENABLE = 0 V,
R = 1.5 V/I(DRVON)
2.3
?
35
?
?
70
?
0.2
140
V
V
k W
2. Guaranteed by design, not tested in production.
http://onsemi.com
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