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| 型号： | NCP6334BMTBBTBG |
| 厂商： | ON Semiconductor |
| 文件页数： | 12/14页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 2A 8-WDFN |
| 标准包装： | 3,000 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.6 V ~ 5.5 V |
| 输入电压： | 2.3 V ~ 5.5 V |
| PWM 型： | 电压模式 |
| 频率 - 开关： | 3MHz |
| 电流 - 输出： | 2A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-WFDFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 8-WDFN（2x2） |
NCP6334B, NCP6334C
In applications with all ceramic output capacitors, the
main ripple component of the output ripple is
VOUT_PP(C). So that the minimum output capacitance can
C IN_MIN +
I OUT_MAX @ D * D 2
V IN_PP @ f SW
(eq. 11)
C MIN +
I IN_RMS + I OUT_MAX @ D * D 2
be calculated regarding to a given output ripple requirement
VOUT_PP in PWM operation mode.
I L_PP
(eq. 10)
8 @ V OUT_PP @ f SW
Input Capacitor Selection
One of the input capacitor selection guides is the input
voltage ripple requirement. To minimize the input voltage
ripple and get better decoupling in the input power supply
rail, ceramic capacitor is recommended due to low ESR and
ESL. The minimum input capacitance regarding to the input
ripple voltage VIN_PP is
where
V OUT
D + (eq. 12)
V IN
In addition, the input capacitor needs to be able to absorb
the input current, which has a RMS value of
(eq. 13)
The input capacitor also needs to be sufficient to protect
the device from over voltage spike, and normally at least a
4.7 m F capacitor is required. The input capacitor should be
located as close as possible to the IC on PCB.
Table 3. LIST OF RECOMMENDED INPUT CAPACITORS AND OUTPUT CAPACITORS
Manufacturer
MURATA
TDK
MURATA
TDK
MURATA
TDK
MURATA
Part Number
GRM21BR60J226ME39, X5R
C2012X5R0J226M, X5R
GRM21BR61A106KE19, X5R
C2012X5R1A106M, X5R
GRM188R60J106ME47, X5R
C1608X5R0J106M, X5R
GRM188R60J475KE19, X5R
Case
Size
0805
0805
0805
0805
0603
0603
0603
Height
Max (mm)
1.4
1.25
1.35
1.25
0.9
0.8
0.87
C ( m F)
22
22
10
10
10
10
4.7
Rated
Voltage
(V)
6.3
6.3
10
10
6.3
6.3
6.3
Structure
MLCC
MLCC
MLCC
MLCC
MLCC
MLCC
MLCC
V OUT + V FB @ 1 )
Design of Feedback Network
For NCP6334B/C devices with an external adjustable
output voltage, the output voltage is programmed by an
external resistor divider connected from V OUT to FB and
then to AGND, as shown in the typical application
schematic Figure 1(a). The programmed output voltage is
R 1
(eq. 14)
R 2
where V FB is equal to the internal reference voltage 0.6 V,
R1 is the resistance from V OUT to FB, which has a normal
value range from 50 k W to 1 M W and a typical value of
220 k W for applications with the typical output filter. R2 is
the resistance from FB to AGND, which is used to program
the output voltage according to equation (14) once the value
of R1 has been selected. A capacitor Cfb needs to be
employed between the V OUT and FB in order to provide
feedforward function to achieve optimum transient
response. Normal value range of Cfb is from 0 to 100 pF, and
a typical value is 15 pF for applications with the typical
output filter and R1 = 220 k W .
Table 4 provides reference values of R1 and Cfb in case
of different output filter combinations. The final design may
need to be fine tuned regarding to application specifications.
Table 4. Reference Values of Feedback Networks (R1 and Cfb) for Output Filter Combinations (L and C)
R1 (k W )
L ( m H)
Cfb (pF)
4.7
0.47
220
3
0.68
220
5
1
220
8
2.2
220
15
3.3
330
15
4.7
330
22
C ( m F)
10
22
220
8
220
15
220
10
220
22
220
15
220
27
220
27
220
39
330
27
330
47
330
39
330
56
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