参数资料
型号: NCV7361ADG
厂商: ON Semiconductor
文件页数: 20/27页
文件大小: 0K
描述: IC REG LDO 5V 50MA 8-SOIC
产品变化通告: Product Discontinuation 27/Jan/2012
标准包装: 98
稳压器拓扑结构: 正,固定式
输出电压: 5V
输入电压: 5.25 V ~ 18 V
稳压器数量: 1
电流 - 输出: 50mA
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOICN
包装: 管件
NCV7361A
Table 1. SO ? 8 Thermal RC Network Models*
Copper Area (1 oz thick)
54 mm 2
714 mm 2
54 mm 2
714 mm 2
(SPICE Deck Format)
Cauer Network
Foster Network
54 mm 2
714 mm 2
Units
Tau
Tau
Units
C_C1
C_C2
C_C3
C_C4
C_C5
C_C6
C_C7
C_C8
C_C9
C_C10
Junction
node1
node2
node3
node4
node5
node6
node7
node8
node9
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
1.08E ? 05
4.10E ? 05
1.13E ? 04
4.42E ? 04
1.74E ? 03
1.39E ? 03
2.08E ? 02
1.08E ? 02
1.14E ? 01
8.11E ? 01
1.08E ? 05
4.10E ? 05
1.13E ? 04
4.40E ? 04
1.71E ? 03
1.34E ? 03
1.78E ? 02
9.75E ? 03
1.84E ? 01
3.00E+00
W ? s/C
W ? s/C
W ? s/C
W ? s/C
W ? s/C
W ? s/C
W ? s/C
W ? s/C
W ? s/C
W ? s/C
1.00E ? 06
1.00E ? 05
1.00E ? 04
5.00E ? 04
1.00E ? 03
1.00E ? 02
1.00E ? 01
1.00E+00
1.00E+01
5.00E+01
1.00E ? 06
1.00E ? 05
1.00E ? 04
5.00E ? 04
1.00E ? 03
1.00E ? 02
1.00E ? 01
1.00E+00
1.00E+01
5.00E+01
sec
sec
sec
sec
sec
sec
sec
sec
sec
sec
R’s
R’s
R_R1
R_R2
R_R3
R_R4
R_R5
R_R6
R_R7
R_R8
R_R9
R_R10
Junction
node1
node2
node3
node4
node5
node6
node7
node8
node9
node1
node2
node3
node4
node5
node6
node7
node8
node9
GND
0.119
0.286
0.857
1.181
1.241
2.574
18.065
27.965
80.896
49.468
0.119
0.286
0.859
1.189
1.276
2.690
21.708
26.035
49.821
15.252
C/W
C/W
C/W
C/W
C/W
C/W
C/W
C/W
C/W
C/W
0.070
0.152
0.481
0.690
0.584
3.223
0.823
26.801
63.710
86.119
0.070
0.152
0.481
0.690
0.584
3.223
0.823
35.166
52.538
25.510
C/W
C/W
C/W
C/W
C/W
C/W
C/W
C/W
C/W
C/W
*Bold face items in the tables above represent the package without the external thermal system.
The Cauer networks generally have physical
significance and may be divided between nodes to separate
thermal behavior due to one portion of the network from
another. The Foster networks, though when sorted by time
simulating tools, whereas Foster networks may be more
easily implemented using mathematical tools (for instance,
in a spreadsheet program), according to the following
formula:
S 1 Ri 1 ? e ? t taui
constant (as above) bear a rough correlation with the Cauer
networks, are really only convenient mathematical models.
Cauer networks can be easily implemented using circuit
R(t) +
n
i +
Junction
C 1
R 1
C 2
R 2
C 3
R 3
C n
R n
Time constants are not simple RC products.
Amplitudes of mathematical solution are not the resistance values.
Figure 29. Grounded Capacitor Thermal Network (“Cauer” Ladder)
Ambient
(thermal ground)
Junction
R 1
C 1
R 2
C 2
R 3
C 3
R n
C n
Each rung is exactly characterized by its RC ? product time constant; Am-
plitudes are the resistances
Figure 30. Non ? Grounded Capacitor Thermal Ladder (“Foster” Ladder)
http://onsemi.com
20
Ambient
(thermal ground)
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