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参数资料
| 型号： | NCV8184PDG |
| 厂商： | ON Semiconductor |
| 文件页数： | 7/20页 |
| 文件大小： | 0K |
| 描述： | IC REG LDO ADJ 8SOIC-EP |
| 标准包装： | 98 |
| 稳压器拓扑结构： | 正，可调式 |
| 输出电压： | 可调 |
| 输入电压： | 4 V ~ 42 V |
| 电压 - 压降（标准）： | 0.35V @ 60mA |
| 稳压器数量： | 1 |
| 电流 - 限制（最小）： | 70mA |
| 工作温度： | -40°C ~ 150°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm Width）裸露焊盘 |
| 供应商设备封装： | 8-SOIC-EP |
| 包装： | 管件 |
NCV8184
External Capacitors
The output capacitor for the NCV8184 is required for
stability. Without it, the regulator output will oscillate.
Actual size and type may vary depending upon the
application load and temperature range. Capacitor effective
series resistance (ESR) is also a factor in the IC stability.
Worst ? case is determined at the minimum ambient
temperature and maximum load expected.
The value of R q JA can then be compared with those in the
Package Thermal Data Section of the data sheet. Those
packages with R q JA ’s less than the calculated value in
equation 2 will keep the die temperature below 150 ° C.
In some cases, none of the packages will be sufficient to
dissipate the heat generated by the IC, and an external heat
sink will be required.
The output capacitor can be increased in size to any
desired value above the minimum. One possible purpose of
this would be to maintain the output voltage during brief
conditions of negative input transients that might be
V IN
I IN
SMART
REGULATOR ?
I OUT
V OUT
) VIN(max)IQ
R q JA + 150 ° C * TA (eq. 2)
characteristic of a particular system.
The capacitor must also be rated at all ambient
temperatures expected in the system. To maintain regulator
stability down to ? 40 ° C, a capacitor rated at that temperature
must be used.
More information on capacitor selection for SMART
REGULATOR ? s is available in the SMART REGULATOR
application note, “Compensation for Linear Regulators,”
document number SR003AN/D, available through our
website at http://www.onsemi.com.
Calculating Power Dissipation in a Single Output
Linear Regulator
The maximum power dissipation for a single output
regulator (Figure 23) is:
PD(max) + {VIN(max) * VOUT(min)} IOUT(max)
(eq. 1)
where:
V IN(max) is the maximum input voltage,
V OUT(min) is the minimum output voltage,
I OUT(max) is the maximum output current, for the
application,and
I Q is the quiescent current the regulator consumes at
I OUT(max) .
Once the value of PD(max) is known, the maximum
permissible value of R q JA can be calculated:
PD
Control
Features
I Q
Figure 23. Single Output Regulator with Key
Performance Parameters Labeled
Heatsinks
A heatsink effectively increases the surface area of the
package to improve the flow of heat away from the IC and
into the surrounding air.
Each material in the heat flow path between the IC and the
outside environment will have a thermal resistance. Like
series electrical resistances, these resistances are summed to
determine the value of R q JA:
R q JA + R q JC ) R q CS ) R q SA (eq. 3)
where:
R q JC = the junction ? to ? case thermal resistance,
R q CS = the case ? to ? heatsink thermal resistance, and
R q SA = the heatsink ? to ? ambient thermal resistance.
R q JC appears in the package section of the data sheet. Like
R q JA , it is a function of package type. R q CS and R q SA are
functions of the package type, heatsink and the interface
between them. These values appear in heat sink data sheets
of heatsink manufacturers.
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