参数资料
| 型号： | NSD-1202-ASST |
| 厂商： | ams |
| 文件页数： | 9/14页 |
| 文件大小： | 0K |
| 描述： | IC DRIVER MOTOR SQUIGGLE 16-QFN |
| 产品培训模块： | Miniature Motion Control Overview |
| 标准包装： | 1 |
| 系列： | SQUIGGLE® |
| 应用： | 压电电机驱动器 |
| 评估套件： | 可供 |
| 输出数： | 2 |
| 电流 - 输出： | 25mA |
| 电压 - 负载： | 24 V ~ 40 V |
| 电源电压： | 2.8 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-VQFN 裸露焊盘 |
| 供应商设备封装： | 16-QFN（4x4） |
| 包装： | 标准包装 |
| 其它名称： | NSD-1202-ASSTDKR |
NSD-1202
Data Sheet - D e t a i l e d D e s c r i p t i o n
7.5 Period Counter
The period counter is used to define the switching frequency of the motor. The pulse period is generated by dividing the clock input frequency by
the given period counter value.
The MSB of the high byte of the pulse counter (h) is used to enable the internal frequency doubler. This function should be used only for input
clock frequencies of 10MHz or less. At 20MHz input clock a decimal period counter value of 111 gives an output frequency of 180.18 kHz. A
period counter value of 112 results in a switching frequency of 178.75 kHz. This is equal to a maximum frequency step of 1.61 kHz. The
frequency resolution gets better for lower output frequencies, assuming a fixed input clock frequency.
The following table presents examples of the period counter and output switching frequency relationship. The values are given for 20MHz and
10MHz clock input frequency. (At 10MHz the frequency doubler can be activated, which leads to the same results.)
Period Counter Value
0110 1111
0111 0000
1000 0101
1000 0110
1000 1110
1000 1111
Typ
180.18
178.57
150.37
149.25
140.85
139.86
Unit
kHz
kHz
kHz
kHz
kHz
kHz
7.6 Pulse Counter
The pulse counter sets the number of pulses the motor should be active. Writing all zeros to the pulse counter stops the motor, even if the
previous set counter value is not completed. All outputs are then low. The same is valid for power-down mode. Bit 6 of the high byte in the pulse
counter (d) is used to set the direction of motor motion.
Pulse Counter Value
XXXX X000 0000 0000
XXXX X100 0000 0000
XXXX X111 1111 1111
Typ
0
1024
2047
Unit
pulses
pulses
pulses
Conditions
Motor is off, driver outputs are low
Maximum possible number of pulses
7.7 Output Voltage Register
This register is used to define the output voltage of the boost converter. The register value is directly transferred to the analog part. The default
value for this register set during power up or power down (XPD = LOW) is equal to 35V nominal output voltage.
Output Voltage Register
0001 0001
0001 0010
0001 1111
0010 0111
0011 0000
0011 0001
Typ
24.0
24.5
31.0
35.0
39.5
40.0
Unit
V
V
V
V
V
V
Conditions
Default value
Varying the output voltage can be used to vary the speed of the motor. However, if two motors are being driven, both motors use a common
output voltage and therefore one setting applies to both motors. To control the speed of two motors independently, use the Duty Cycle Register.
www.austriamicrosystems.com/NSD-1202
Revision 0.2
8 - 13
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