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| 型号： | NT5DS32M8AW-7K |
| 厂商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 256Mb Double Data Rate SDRAM |
| 中文描述： | 256MB双数据速率SDRAM |
| 文件页数： | 62/78页 |
| 文件大小： | 1534K |
| 代理商： | NT5DS32M8AW-7K |
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NT5DS64M4AT NT5DS64M4AW
NT5DS32M8AT NT5DS32M8AW
256Mb Double Data Rate SDRAM
REV 1.1
12/2001
62
NANYA TECHNOLOGY CORP
. All rights reserved.
NANYA TECHNOLOGY CORP. reserves the right to change Products and Specifications without notice.
14. An input setup and hold time derating table is used to increase t
IS
and t
IH
in the case where the input slew
rate is below 0.5 V/ns.
15. An input setup and hold time derating table is used to increase t
DS
and t
DH
in the case where the I/O slew rate is below
0.5 V/ns.
16. An I/O Delta Rise, Fall Derating table is used to increase t
DS
and t
DH)
in the case where DQ, DM, and DQS slew rates
differ.
Input Slew Rate
delta
( t
IS)
delta
( t
IH)
Unit
Notes
0.5 V/ns
0
0
ps
1,2
0.4 V/ns
+50
0
ps
1,2
0.3 V/ns
+100
0
ps
1,2
1. Input slew rate is based on the lesser of the slew rates determined by either V
IH (AC)
to V
IL (AC)
or V
IH (DC)
to V
IL (DC)
, similarly for rising
transitions.
2. These derating parameters may be guaranteed by design or tester characterization and are not necessarily tested on eachdevice.
Input Slew Rate
delta
( t
DS)
delta
( t
DH)
Unit
Notes
0.5 V/ns
0
0
ps
1,2
0.4 V/ns
+75
+75
ps
1,2
0.3 V/ns
+150
+150
ps
1,2
1. I/O slew rate is based on the lesser of the slew rates determined by either V
IH (AC)
to V
IL (AC)
or V
IH (DC)
to V
IL (DC)
, similarly for rising
transitions.
2. These derating parameters may be guaranteed by design or tester characterization and are not necessarily tested on eachdevice.
Input Slew Rate
delta
( t
DS)
delta
( t
DH)
Unit
Notes
0.0 V/ns
0
0
ps
1,2,3,4
0.25 V/ns
+50
+50
ps
1,2,3,4
0.5 V/ns
+100
+100
ps
1,2,3,4
1. Input slew rate is based on the lesser of the slew rates determined by either V
IH (AC)
to V
IL (AC)
or V
IH (DC)
to V
IL (DC)
, similarly for rising
transitions.
2. Input slew rate is based on the larger of AC to AC delta rise, fall rate and DC to DC delta rise, fall rate.
3. The delta rise, fall rate is calculated as: [1/(slew rate 1)] - [1/(slew rate 2)]
For example: slew rate 1 = 0.5 V/ns; slew rate 2 = 0.4 V/ns
Delta rise, fall = (1/0.5) - (1/0.4) [ns/V]
= -0.5 ns/V
Using the table above, this would result in an increase in t
DS
and t
DH
of 100 ps.
4. These derating parameters may be guaranteed by design or tester characterization and are not necessarily tested on each device.
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PDF描述 |
|---|---|
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| NT5DS64M4AW-75B | 256Mb Double Data Rate SDRAM |
| NT5DS64M4AW-7K | 256Mb Double Data Rate SDRAM |
| NT5DS64M4AW-8B | 256Mb Double Data Rate SDRAM |
| NT5DS32M8AW | 256Mb DDR333/300 SDRAM |
相关代理商/技术参数 |
参数描述 |
|---|---|
| NT5DS32M8AW-8B | 制造商:未知厂家 制造商全称:未知厂家 功能描述:256Mb Double Data Rate SDRAM |
| NT5DS32M8CS | 制造商:NANOAMP 制造商全称:NANOAMP 功能描述:256Mb DDR Synchronous DRAM |
| NT5DS32M8CS-5T | 制造商:NANOAMP 制造商全称:NANOAMP 功能描述:256Mb DDR Synchronous DRAM |
| NT5DS32M8CS-6K | 制造商:NANOAMP 制造商全称:NANOAMP 功能描述:256Mb DDR Synchronous DRAM |
| NT5DS32M8CT | 制造商:NANOAMP 制造商全称:NANOAMP 功能描述:256Mb DDR Synchronous DRAM |
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