Description (Cont’d):
In the standard divide
–
by
–
525 mode, the integrated vertical pulse is used only to provide coincidence
with the 545 count (counter preset = 20, 545
–
20 = 525) in the phase detector circuit. The vertical
ramp is timed by the output of the 525 counter. In standard mode, the NTE849 will maintain the divide
–
by
–
525 count for six fields of lost or mutilated sync. If the seventh field does not have the correct coin-
cidence, the unit will switch to non
–
standard mode. In this mode, the vertical sync is derived from
the integrated vertical pulse on a field
–
to
–
field basis. A noise immunity of 384 lines is provided. In
the absence of sync pulses, the count will be 684 instead of 525 so that rapid vertical capture may
be achieved when sync is restored. Non
–
satndard mode still may be selected by removing GND from
Pin8.
The vertical retrace signal is converted to a ramp signal if a capacitor is connected between Pin3 and
GND. The ramp
’
s slope corresponds to vertical size and is controlled by changing the input current
to Pin2. The ramp is connected to the inverting input of a diffrence amplifier. The output of this amplifi-
er, connectd to Pin6, is used to drive the vertical output stage. The non
–
inverting input of the differ-
ence amplifier is at Pin5. A voltage derived from yoke current may be applied to this pin for linearity
improvement.
The pulse width of the vertical blanking signal at Pin7 is 608 clocks wide in the synchronous mode,
and is adjustable in width by changing the monostable RC network at Pin10 for the non
–
synchronous
mode.
The proportional voltage regulator output at Pin4 is about 43% of the supply voltage at Pin12. The
maximum external load current is 20mA (Peak).
Features:
Automatic Forced Asynchronous Mode to
Remove Jitter
Improved Low Voltage Start
–
Up Operation
Lower Zero
–
State Horizontal
–
Drive Pulse
Output
Improved Symmetry for Horizontal
–
Drive
Output
Improved Automatic Standard Operation
Noise Detector
Handles Standard NTSC and Non
–
Standard
Signals
Automatic Mode Recognition
Clock Input
Vertical Ramp (Sawtooth) Generator
Vertical Amplifier
Vertical Blanking Generator
Horizontal Drive Pulse Output
Ratio
–
Voltage Regulator
Inherent Interlace for NTSC Signals
Vertical
–
Hold Control Eliminated
Supply Voltage Range: 10.8V to 13.2V
Rapid Pull
–
In
Co
–
Channel Sync Lockout for NTSC Signals
I
2
L Logic
Absolute Maximum Ratings:
DC Supply Voltage
Device Dissipation (T
A
≤
+70
°
C)
Derate Linearily Above 70
°
C
Operating Ambient Temperature Range
Storage Temperature Range
Lead Temperature (During Soldering, 1/16
”
from case, 10sec max)
15V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
530mW
6.7mW/
°
C
0
°
to +70
°
C
–
55
°
to +150
°
C
+265
°
C
. . . . . . . . . . . . . . . . . . . .