参数资料
型号: P89LPC935FA,129
厂商: NXP Semiconductors
文件页数: 76/77页
文件大小: 0K
描述: IC 80C51 MCU FLASH 8K 28-PLCC
产品培训模块: Migrating from 8/16-Bit MCUs to 32-Bit ARMs
标准包装: 37
系列: LPC900
核心处理器: 8051
芯体尺寸: 8-位
速度: 12MHz
连通性: I²C,SPI,UART/USART
外围设备: 欠压检测/复位,LED,POR,PWM,WDT
输入/输出数: 26
程序存储器容量: 8KB(8K x 8)
程序存储器类型: 闪存
EEPROM 大小: 512 x 8
RAM 容量: 768 x 8
电压 - 电源 (Vcc/Vdd): 2.4 V ~ 3.6 V
数据转换器: A/D 8x8b; D/A 2x8b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 28-PLCC
包装: 管件
产品目录页面: 706 (CN2011-ZH PDF)
配用: 622-1014-ND - BOARD FOR LPC9XX TSSOP
622-1006-ND - SOCKET ADAPTER BOARD
568-4000-ND - DEMO BOARD SPI/I2C TO DUAL UART
568-3510-ND - DEMO BOARD SPI/I2C TO UART
622-1002-ND - USB IN-CIRCUIT PROG LPC9XX
568-1759-ND - EMULATOR DEBUGGER/PROGRMMR LPC9X
568-1758-ND - BOARD EVAL FOR LPC93X MCU FAMILY
其它名称: 568-1287-5
935274628129
P89LPC935FA-S
P89LPC933_934_935_936
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 8 — 12 January 2011
8 of 77
NXP Semiconductors
P89LPC933/934/935/936
8-bit microcontroller with accelerated two-clock 80C51 core
P1.0 to P1.7
I/O, I [1] Port 1: Port 1 is an 8-bit I/O port with a user-configurable output type,
except for three pins as noted below. During reset Port 1 latches are
configured in the input only mode with the internal pull-up disabled. The
operation of the configurable Port 1 pins as inputs and outputs depends
upon the port configuration selected. Each of the configurable port pins
are programmed independently. Refer to Section 8.13.1 “Port
P1.3 are open drain when used as outputs. P1.5 is input only.
All pins have Schmitt trigger inputs.
Port 1 also provides various special functions as described below:
P1.0/TXD
18
14
I/O
P1.0 — Port 1 bit 0.
O
TXD — Transmitter output for the serial port.
P1.1/RXD
17
13
I/O
P1.1 — Port 1 bit 1.
I
RXD — Receiver input for the serial port.
P1.2/T0/SCL 12
8
I/O
P1.2 — Port 1 bit 2 (open-drain when used as output).
I/O
T0 — Timer/counter 0 external count input or overflow output (open-drain
when used as output).
I/O
SCL — I2C serial clock input/output.
P1.3/INT0/
SDA
11
7
I/O
P1.3 — Port 1 bit 3 (open-drain when used as output).
I
INT0 — External interrupt 0 input.
I/O
SDA — I2C serial data input/output.
P1.4/INT1
10
6
I
P1.4 — Port 1 bit 4.
I
INT1 — External interrupt 1 input.
P1.5/RST
62I
P1.5 — Port 1 bit 5 (input only).
I
RST — External reset input during power-on or if selected via UCFG1.
When functioning as a reset input, a LOW on this pin resets the
microcontroller, causing I/O ports and peripherals to take on their default
states, and the processor begins execution at address 0. Also used during
a power-on sequence to force ISP mode. When using an oscillator
frequency above 12 MHz, the reset input function of P1.5 must be
enabled. An external circuit is required to hold the device in reset at
power-up until VDD has reached its specified level. When system
power is removed VDD will fall below the minimum specified
operating voltage. When using an oscillator frequency above
12 MHz, in some applications, an external brownout detect circuit
may be required to hold the device in reset when VDD falls below the
minimum specified operating voltage.
P1.6/OCB
5
1
I/O
P1.6 — Port 1 bit 6.
O
OCB — Output Compare B. (P89LPC935/936)
P1.7/OCC/
AD00
428
I/O
P1.7 — Port 1 bit 7.
O
OCC — Output Compare C. (P89LPC935/936)
I
AD00 — ADC0 channel 0 analog input. (P89LPC935/936)
Table 4.
Pin description …continued
Symbol
Pin
Type
Description
TSSOP28,
PLCC28
HVQFN28
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