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| 型号： | P89LPC9381FDH |
| 厂商： | NXP Semiconductors N.V. |
| 元件分类： | 8位微控制器 |
| 英文描述： | 8-bit microcontroller with accelerated two-clock 80C51 core 4 kB 3 V byte-erasable flash with 10-bit ADC |
| 封装： | P89LPC9381FDH<SOT361-1 (TSSOP28)|<<http://www.nxp.com/packages/SOT361-1.html<1<Always Pb-free,; |
| 文件页数： | 11/59页 |
| 文件大小： | 286K |
| 代理商： | P89LPC9381FDH |
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P89LPC9381_1
Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 — 8 September 2006
19 of 60
Philips Semiconductors
P89LPC9381
8-bit microcontroller with 10-bit ADC
7.7 CCLK wake-up delay
The P89LPC9381 has an internal wake-up timer that delays the clock until it stabilizes
depending on the clock source used. If the clock source is any of the three crystal
selections (low, medium and high frequencies) the delay is 992 OSCCLK cycles plus
60 to 100
s. If the clock source is either the internal RC oscillator, watchdog oscillator, or
external clock, the delay is 224 OSCCLK cycles plus 60
sto100 s.
7.8 CCLK modication: DIVM register
The OSCCLK frequency can be divided down up to 510 times by conguring a dividing
register, DIVM, to generate CCLK. This feature makes it possible to temporarily run the
CPU at a lower rate, reducing power consumption. By dividing the clock, the CPU can
retain the ability to respond to events that would not exit Idle mode by executing its normal
program at a lower rate. This can also allow bypassing the oscillator start-up time in cases
where Power-down mode would otherwise be used. The value of DIVM may be changed
by the program at any time without interrupting code execution.
7.9 Low power select
The P89LPC9381 is designed to run at 12 MHz (CCLK) maximum. However, if CCLK is
8 MHz or slower, the CLKLP SFR bit (AUXR1.7) can be set to ‘1’ to lower the power
consumption further. On any reset, CLKLP is ‘0’ allowing highest performance access.
This bit can then be set in software if CCLK is running at 8 MHz or slower.
7.10 Memory organization
The various P89LPC9381 memory spaces are as follows:
DATA
128 B of internal data memory space (00H:7FH) accessed via direct or indirect
addressing, using instructions other than MOVX and MOVC. All or part of the Stack
may be in this area.
IDATA
Indirect Data. 256 B of internal data memory space (00H:FFH) accessed via indirect
addressing using instructions other than MOVX and MOVC. All or part of the Stack
may be in this area. This area includes the DATA area and the 128 B immediately
above it.
SFR
Special Function Registers. Selected CPU registers and peripheral control and status
registers, accessible only via direct addressing.
相关PDF资料 |
PDF描述 |
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| P89LPC938FDH | 8-bit microcontroller with accelerated two-clock 80C51 core 8 kB 3 V byte-erasable Flash with 10-bit A-D converter |
| P8 | HERMAPHRODITIC, STRAIGHT BOARD STACKING CONNECTOR, SURFACE MOUNT |
| PA33 | Operational Amplifier |
| PA33A | Operational Amplifier |
| PA35WPF | KLEMMLEISTE KABELSCHUTZ 12POL 380VAC 6A |
相关代理商/技术参数 |
参数描述 |
|---|---|
| P89LPC9381FDH,512 | 功能描述:8位微控制器 -MCU 4K FL/256B RAM/ RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| P89LPC938FA | 制造商:NXP Semiconductors 功能描述:IC MCU 8BIT 80C51 8K FLASH PLCC28 |
| P89LPC938FA,129 | 功能描述:8位微控制器 -MCU 80C51 8K FL 768B RAM RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| P89LPC938FA129 | 制造商:NXP Semiconductors 功能描述:P89LPC938FA/PLCC28/TUBESM// |
| P89LPC938FDH | 制造商:NXP Semiconductors 功能描述:MCU 8BIT 80C51 8K FLASH TSSOP28 制造商:NXP Semiconductors 功能描述:MCU 8BIT 80C51 8K FLASH, TSSOP28 制造商:NXP Semiconductors 功能描述:MCU 8BIT 80C51 8K FLASH, TSSOP28, Controller Family/Series:(8051) 8052, Core Siz |
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