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参数资料
| 型号： | PBL386652QNS |
| 厂商： | ERICSSON |
| 英文描述： | Subscriber Line Interface Circuit |
| 中文描述： | 用户线接口电路 |
| 文件页数： | 17/18页 |
| 文件大小： | 184K |
| 代理商： | PBL386652QNS |
PBL 386 65/2
17
Preliminary
Active Polarity Reversal State
TIPX and RINGX polarity is reversed com-
pared to the Active State: RINGX is the
terminal closest to ground and sources
loop current while TIPX is the more nega-
tive terminal and sinks current. The loop
current or the ground key detector is acti-
vated. The loop current detector will indi-
cate off hook with a logic low level and the
ground key detector will indicate active
ground key with a logic high level present at
the detector output.
Tip Open State
The Tip Open State is used for ground start
signaling.
In this state the SLIC presents a high
impedance on the TIPX pin and the pro-
grammed dc characteristic on the RINGX
pin, without the longitudinal current com-
pensation.
The loop current detector is active (refer
to the datasheet for information on the
detector threshold level).
Overvoltage Protection
PBL 386 65/2 must be protected against
overvoltages on the telephone line. The
overvoltages could be caused for instance
by lightning, ac power contact and induc-
tion. Refer to Maximum Ratings, TIPX and
RINGX terminals, for maximum continu-
ous and transient voltages.
Secondary Protection
The circuit shown in figure 13 utilizes series
resistors together with a programmable
overvoltage protector (e g Power Innova-
tions TISP PBL2), serving as a secondary
protection.
The TISP PBL2 is a dual forward-con-
ducting buffered p-gate overvoltage pro-
tector. The protector gate references the
protection (clamping) voltage to negative
supply voltage (i.e. the battery voltage, V
).
As the protection voltage will track the
negative supply voltage the overvoltage
stress on the SLIC is minimized.
Positive overvoltages are clamped to
ground by a diode. Negative overvoltages
are initially clamped close to the SLIC neg-
ative supply rail voltage and the protector
will crowbar into a low voltage on-state
condition, by firing an internal thyristor.
A gate decoupling capacitor, C
, is need-
ed to carry enough charge to supply a high
enough current to quickly turn on the thyris-
tor in the protector. C
should be placed
close to the overvoltage protection device.
Without the capacitor even the low induc-
tance in the track to the V
supply will limit
the current and delay the activation of the
thyristor clamp.
The fuse resistors R
serve the dual pur-
poses of being non- destructive energy
dissipators, when transients are clamped
and of being fuses, when the line is ex-
posed to a power cross. If a PTC is chosen
for R
, note that it is important to always
use the PTC′s in series with resistors not
sensitive to temperature, as the PTC will
act as a capacitance for fast transients and
therefore will not protect the TISP.
Power-up Sequence
No special power-up sequence is neces-
sary except that ground has to be present
before all other power supply voltages.
The digital inputs C1 to C3 are internal
pull-up terminals.
Printed Circuit Board Layout
Care in Printed Circuit Board (PCB) layout
is essential for proper function;
The components connecting to the RSN
input should be placed in close proximity to
that pin, such that no interference is inject-
ed into the RSN pin. Ground plane sur-
rounding the RSN pin is advisable.
Analog ground (AGND) should be con-
nected to battery ground (BGND) on the
PCB in one point.
R
and R
should be connected to
AGND with short leads. Pin LP, pin PSG
and pin AOV are sensitive to leakage cur-
rents. Pin AOV should be surrounded by a
guardring connected to AGND.
R
and C
connections to VBAT should
be short and very close to each other.
C
and C
B2
must be connected with short
wide leads.
Notes
Note 11
3.1 V
if AOV-pin is left open and 0.6 V
Peak
if AOV-pin is connected to AGND.
Note 12
R
lower than 2x50
will reduce noise
and PSRR performance in resistive loop
region (reference D in figure 15). Better
PSRR performance can be achieved by
increasing C
LP
and C
HP
.
Note 13.
If the momentary value of the current in
TIPX-pin or RINGX-pin exceeds 85mA
harmonic distortion specification can be
derated.
Note 14.
The accurate equation for R
LC
is:
R
LC
= 500 - 10.4
In (I
LProg
32)
I
LProg
I
LProg
Note 15.
6.0V when AOV-pin is not connected, 3.9V
when AOV-pin is connected to AGND.
Note 16.
2.2V
if AOV-pin is left open and 0.4V
RMS
if AOV-pin is connected to AGND.
Note 17.
6.8V when AOV-pin is left open, 4.2V when
AOV-pin is connected to AGND.
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