- 您现在的位置：买卖IC网 > PDF目录378041 > PBL40215 (ERICSSON) RF Transceiver circuit for the Digital Enhanced Cordless Telecommunications (DECT) system PDF资料下载
参数资料
| 型号： | PBL40215 |
| 厂商： | ERICSSON |
| 英文描述： | RF Transceiver circuit for the Digital Enhanced Cordless Telecommunications (DECT) system |
| 中文描述： | RF收发器电路的数字增强无线电话（DECT）系统 |
| 文件页数： | 9/22页 |
| 文件大小： | 214K |
| 代理商： | PBL40215 |
9
PBL 402 15
The 3-Wire Control Bus Interface.
The 3-wire serial bus interface controls the various IC parameters and consists of 3 lines, strobe, data and clock ( ST, D, CK ).
Alternatively, selected power control modes may be controlled by 3 hard-wire control lines ( EN, RXEN, TXEN ).
The 3-wire bus is active when either EN or ST, or both are active. The strobe signal is used to enable the clock and latch the
data frame. Each frame consists of 24 bits, built from a word field and a data field. The word address is the last bit to be sent
( LSB ), with the data field being the proceeding 23 bits. Data on D is shifted into the frame register by clock CK.
The 3-wire interface allows setting of word A and word B. These control the IC configuration.
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
LSB
Last in
Word
Address
Data
MSB
First in
Frame:
Description
tag:
Frame definition:
ST
Digital input
The control section is powered up when ST is low. Data is latched on the rising edge.
ST has an internal 160k
pull up resistor to V
CC
PLL.
3-wire interface clock. May be running continuously, but to minimise the risk of VCO spurious it is
recommended that the clock only runs when required.
3-wire interface data. Data latched by rising edge of CK.
IC enable control. Active low. The control section is powered when EN is active.
EN has an internal 160 k
pull up resistor to V
CC
PLL.
Receiver enable. Active low.
Transmitter enable. Active low.
CK
Digital input
D
EN
Digital input
Digital input
RXEN
TXEN
Digital input
Digital input
Pin Spec. Description
Digital Interface:
Digital Interface:
Parameter
Serial clock frequency
Delay strobe to first rising clock
Data setup time: D to CK
Data hold time
Clock pulse widh high
Strobe hold time high
Condition
Symbol
f
CK
t
SCK
t
DS
t
DH
t
CKW
t
SW
Min.
Typ.
Max.
13.9
Unit
MHz
ns
ns
ns
ns
ns
288
18
18
18
144
相关PDF资料 |
PDF描述 |
|---|---|
| PBL40305 | Multiband GSM Power Amplifier |
| PBL40307 | GSM Dual Band Tx_VCO |
| PBL40309 | 3.6 V Differential Power Amplifier for DECT Telecommunications system |
| PBL40310 | 3.5 V GSM 900 MHz Power Amplifier |
| PBM39601NS | Microstepping Controller/Dual Digital-to-Analog Converter |
相关代理商/技术参数 |
参数描述 |
|---|---|
| PBL403 | 制造商:DIODES 制造商全称:Diodes Incorporated 功能描述:4.0A BRIDGE RECTIFIER |
| PBL40305 | 制造商:ERICSSON 制造商全称:Ericsson 功能描述:Multiband GSM Power Amplifier |
| PBL40307 | 制造商:ERICSSON 制造商全称:Ericsson 功能描述:GSM Dual Band Tx_VCO |
| PBL40309 | 制造商:ERICSSON 制造商全称:Ericsson 功能描述:3.6 V Differential Power Amplifier for DECT Telecommunications system |
| PBL40310 | 制造商:ERICSSON 制造商全称:Ericsson 功能描述:3.5 V GSM 900 MHz Power Amplifier |
发布紧急采购，3分钟左右您将得到回复。