![](http://datasheet.mmic.net.cn/130000/PC13892AJVL_datasheet_5010626/PC13892AJVL_49.png)
1us
0mA
Imax
Iload
Iload for Transient Load Response
10us
Vnom + 0.8V
Vin
Vin for Transient Line Response
Vnom + 0.3V
Overshoot
IL = 0mA
Vout
Vout for Transient Load Response
IL = Imax
Overshoot
IL < ILmaxlp
Vout
Vout for Mode Transition Response (VGEN1/2/3, VVIDEO, VCAM, VSD)
Overshoot
Active Mode
Low Power Mode
Active Mode
IL < ILmax
Mode
Transition
Time
IL < ILmax
Analog Integrated Circuit Device Data
Freescale Semiconductor
49
13892
FUNCTIONAL DEVICE OPERATION
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010: MC13892*VK and MC13892*VL in 139, 186 MAPBGA packages.
Figure 9. Transient Response Waveforms
VAUDIO AND VVIDEO SUPPLIES
The primary applications of these power supplies are for
audio, and TV-DAC. These supplies could also be used for
other peripherals if one of these functions is not required. Low
Power modes and programmable Standby options can be
used to optimize power efficiency during deep sleep modes.
VAUDIO is implemented with an integrated PMOS pass
FET and has a dedicated input supply pin VINAUDIO.
The nominal output voltage (VNOM as referred in Table
Table 4) of VVIDEO can go from 2.5 to 2.7 V on 0.1 V steps,
it also can be programmed to be 2.775 V. Its output current
depends on the external pass device.
The nominal output voltage (VNOM as referred in Table
Table 4) of VAUDIO can be programmed to be 2.3, 2.5, 2.775
or 3.0 V.
LOW VOLTAGE SUPPLIES
VDIG and VPLL are provided for isolated biasing of the
Baseband system PLLs for clock generation in support of
protocol and peripheral needs. Depending on the lineup and
power requirements, these supplies may be considered for
sharing with other loads, but noise injection must be avoided
and filtering added if necessary, to ensure suitable PLL
performance. The VDIG and VPLL regulators have a
dedicated input supply pin: VINDIG for the VDIG regulator
and VINPLL for the VPLL regulator. VINDIG and VINPLL can
be connected to either BP or a 1.8 V switched mode power
supply rail such as from SW4 for the two lower set points of
each regulator (1.2 V and 1.25 V output for VPLL and 1.05
and 1.25 V output for VDIG). In addition, when the two upper
set points are used (1.50 V and 1.8 V output for VPLL and
1.65 V and 1.8 V for VDIG) can be connected to either BP or
a 2.2 V nominal external switched mode power supply rail to
improve power dissipation.
The nominal programmable output voltage of VPLL (VNOM
as referred in
Table 4) could be 1.2, 1.25, 1.50 or 1.8 V, while
VDIG can be configured to 1.05, 1.25, 1.65 and 1.8 V.
PERIPHERAL INTERFACING
IC interfaces in the lineups generally fall in two categories:
low voltage IO primarily associated with the AP IC and certain