参数资料
型号: PC13892JVK
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 电源管理
英文描述: 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PBGA139
封装: 7 X 7 MM, 0.50 MM PITCH, ROHS COMPLIANT, PLASTIC, MO-195AD, BGA-139
文件页数: 35/75页
文件大小: 3848K
代理商: PC13892JVK
Analog Integrated Circuit Device Data
40
Freescale Semiconductor
13892
FUNCTIONAL DESCRIPTION
FUNCTIONAL PIN DESCRIPTION
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010: MC13892VK and MC13892VL in 139, 186 MAPBGA packages.
LED DRIVERS
SWLEDOUT
Boost converter output for serial LED drive. It provides up
to 25.5 V for supplying LED strings driven by LEDMD,
LEDAD and LEDKP.
GNDSWLED
Ground for boost converter for serial LED drive
LEDMD, LEDAD, AND LEDKP
LEDMD - Main display backlight LED driver output.
LEDAD - Auxiliary display backlight LED driver output.
LEDKP - Keypad lighting LED driver output.
Independent programmable current sink channels. LED
strings must be connected from SWLEDOUT (anodes) to
these pins (cathodes). When parallel strings are ganged
together on a driver channel, ballasting resistance is
recommended to help balance the currents in each leg.
LEDR, LEDG AND LEDB
General purpose LED driver output Red, Green and Blue
respectively. Each channel provides flexible LED intensity
control. These pins can also be used as general purpose
open drain outputs for logic signaling, or as generic PWM
generator outputs.
GNDLED E5
Ground for LED drivers
IC CORE
VCORE
Regulated supply output for the IC analog core circuitry. It
is used to define the PUMS VIH level during initialization. The
bandgap and the rest of the core circuitry are supplied from
VCORE. Place a 2.2
μF capacitor from this pin to
GNDCORE.
VCOREDIG
Regulated supply output for the IC digital core circuitry. No
external DC loading is allowed on VCOREDIG. VCOREDIG
is kept powered as long as there is a valid supply and/or coin
cell. Place a 2.2
μF capacitor from this pin to GNDCORE.
REFCORE
Main bandgap reference. All regulators use the main
bandgap as the reference. The main bandgap is bypassed
with a capacitor at REFCORE. No external DC loading is
allowed on REFCORE. Place a 100 nF capacitor from this pin
to GNDCORE.
GNDCORE
Ground for the IC core circuitry.
POWER GATING
PWGTDRV1 AND PWGTDRV2
Power Gate Drivers.
PWGTDRV1 is provided for power gating peripheral loads
sharing the processor core supply domain(s) SW1, and/or
SW2, and/or SW3. In addition, PWGTDRV2 provides support
to power gate peripheral loads on the SW4 supply domain.
In typical applications, SW1, SW2, and SW3 will both be
kept active for the processor modules in state retention, and
SW4 retained for the external memory in self refresh mode.
SW1, SW2, and SW3 power gating FET drive would typically
be connected to PWGTDRV1 (for parallel NMOS switches).
SW4 power gating FET drive would typically be connected to
PWGTDRV2. When low power Off mode is activated, the
power gate drive circuitry will be disabled, turning off the
NMOS power gate switches to isolate the maintained supply
domains from any peripheral loading.
SWITCHERS
SW1IN, SW2IN, SW3IN AND SW4IN
Switchers 1, 2, 3, and 4 input. Connect these pins to BP to
supply Switchers 1, 2, 3, and 4.
SW1FB, SW2FB, SW3FB AND SW4FB
Switchers 1, 2, 3, and 4 feedback. Switchers 1, 2, 3, and 4
output voltage sense respectively. Connect these pins to the
farther point of each of their respective SWxOUT pin, in order
to sense and maintain voltage stability.
SW1OUT
Switcher 1 output. Buck switcher for processor core(s).
GNDSW1
Ground for Switcher 1.
SW2OUT
Switcher 2 output. Buck switcher for processor SOG, etc.
GNDSW2
Ground for Switcher 2.
SW3OUT
Switcher 3 output. Buck switcher for internal processor
memory and peripherals.
GNDSW3
Ground for switcher 3.
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