参数资料
型号: PC13892JVK
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 电源管理
英文描述: 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PBGA139
封装: 7 X 7 MM, 0.50 MM PITCH, ROHS COMPLIANT, PLASTIC, MO-195AD, BGA-139
文件页数: 52/75页
文件大小: 3848K
代理商: PC13892JVK
Analog Integrated Circuit Device Data
56
Freescale Semiconductor
13892
FUNCTIONAL DEVICE OPERATION
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010: MC13892VK and MC13892VL in 139, 186 MAPBGA packages.
Figure 10. Transient Response Waveforms
VAUDIO AND VVIDEO SUPPLIES
The primary applications of these power supplies are for
audio, and TV-DAC. These supplies could also be used for
other peripherals if one of these functions is not required. Low
Power modes and programmable Standby options can be
used to optimize power efficiency during deep sleep modes.
VAUDIO is implemented with an integrated PMOS pass
FET and has a dedicated input supply pin VINAUDIO.
The nominal output voltage (VNOM as referred in Table
Table 4) of VVIDEO can go from 2.5 to 2.7 V on 0.1 V steps,
it also can be programmed to be 2.775 V. Its output current
depends on the external pass device.
The nominal output voltage (VNOM as referred in Table
Table 4) of VAUDIO can be programmed to be 2.3, 2.5, 2.775
or 3.0 V.
LOW VOLTAGE SUPPLIES
VDIG and VPLL are provided for isolated biasing of the
Baseband system PLLs for clock generation in support of
protocol and peripheral needs. Depending on the lineup and
power requirements, these supplies may be considered for
sharing with other loads, but noise injection must be avoided
and filtering added if necessary, to ensure suitable PLL
performance. The VDIG and VPLL regulators have a
dedicated input supply pin: VINDIG for the VDIG regulator
and VINPLL for the VPLL regulator. VINDIG and VINPLL can
be connected to either BP or a 1.8 V switched mode power
supply rail such as from SW4 for the two lower set points of
each regulator (1.2 V and 1.25 V output for VPLL and 1.05
and 1.25 V output for VDIG). In addition, when the two upper
set points are used (1.50 V and 1.8 V output for VPLL and
1.65 V and 1.8 V for VDIG) can be connected to either BP or
a 2.2 V nominal external switched mode power supply rail to
improve power dissipation.
The nominal programmable output voltage of VPLL (VNOM
as referred in Table 4) could be 1.2, 1.25, 1.50 or 1.8 V, while
VDIG can be configured to 1.05, 1.25, 1.65 and 1.8 V.
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