参数资料
型号: PC16552D
厂商: National Semiconductor Corporation
英文描述: Dual Universal Asynchronous Receiver/Transmitter with FIFOs
中文描述: 双路通用异步接收器/发射器与FIFO的
文件页数: 12/21页
文件大小: 291K
代理商: PC16552D
6.0 Pin Descriptions
(Continued)
RI1, RI2
(Ring Indicator), pins 43, 31: When low, this indi-
cates that a telephone ringing signal has been received by
the MODEM or data set. The RI signal is a MODEM status
input whose condition the CPU can test by reading bit 6 (RI)
of the MODEM Status Register for the appropriate channel.
Bit 6 is the complement of the RI signal. Bit 2 (TERI) of the
MODEM Status Register indicates whether the RI input
sig-
nal
has changed from a low to a high state since the previ-
ous reading of the MODEM Status Register.
Note:
Whenever the RI
bit
of the MODEM Status Register changes from a
high to a low state, an interrupt is generated if the MODEM Status
Interrupt is enabled.
SIN1, SIN2
(Serial Input), pins 39, 25 : Serial data input from
the communications link (peripheral device, MODEM, or
data set).
SOUT1, SOUT2
(Serial Output), pins 38, 26: Composite se-
rial data output to the communications link (peripheral,
MODEM or data set). The SOUT signal is set to the Marking
(logic 1) state upon a Master Reset operation.
TXRDY1, TXRDY2
(Transmitter Ready), pins 1, 32: Trans-
mitter DMA signalling is available through two pins. When
operating in the FIFO mode, the CPU selects one of
two types of DMA transfer via FCR3. When operating as in
the 16450 Mode, only DMA mode 0 is allowed. Mode 0
supports single transfer DMA where a transfer is made be-
tween CPU bus cycles. Mode 1 supports multi-transfer DMA
where multiple transfers are made continuously until the
XMIT FIFO has been filled. Details regarding the active and
inactive states of this signal are given in Section 8.5, Bit 3.
V
DD
(Power), pins 33, 44:
a
5V Supply
V
SS
(Ground), pins 12, 22: 0V Reference
WR
(Write), pin 20: When WR is low while the chip is select-
ed, the CPU can write control words or data into the select-
ed DUART register.
XIN
(External Crystal Input), pin 11: This signal input is used
in conjunction with XOUT to form a feedback circuit for the
baud rate generator’s oscillator. If a clock signal will be gen-
erated off-chip, then it should drive the baud rate generator
through this pin.
XOUT
(External Crystal Output), pin 13: This signal output is
used in conjunction with XIN to form a feedback circuit for
the baud rate generator’s oscillator. If the clock signal will
be generated off-chip, then this pin is unused.
7.0 Connection Diagram
Chip Carrier Package
TL/C/9426–17
Top View
Order Number PC16552D
See NS Package Number V44A
12
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