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参数资料
| 型号： | PC33880DWBR2 |
| 厂商： | MOTOROLA INC |
| 元件分类： | 运动控制电子 |
| 英文描述： | BRUSH DC MOTOR CONTROLLER, 2 A, PDSO28 |
| 封装： | PLASTIC, SOIC-28 |
| 文件页数： | 10/24页 |
| 文件大小： | 362K |
| 代理商： | PC33880DWBR2 |
33880
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
18
condition causing the open load fault is removed, the device will
resume normal operation. The open load fault however, will be
latched in the output DO register for the MCU to read.
Shorted Load Fault
A shorted load (over current) fault can be caused by any
output being shorted directly to supply, or an output
experiencing a current greater than the current limit.
There are two safety circuits progressively in operation
during load short conditions providing system protection.
1. The device’s output current is monitored in an analog
fashion using SENSEFET
approach and current
limited.
2. The device’s output thermal limit is sensed and when
attained causes only the specific faulted output to
shutdown. The output will remain off until cooled. The
device will then reassert the output automatically. The
cycle will continue until fault is remove or the command
bit instructs the output off.
Under Voltage Shutdown
An under voltage VDD condition will result in the global
shutdown of all outputs. The undervoltage threshold is between
3.9 V and 4.6 V. When VDD goes below the threshold, all
outputs are turned OFF and the Fault Status (FS) register is
cleared. As VDD returns to normal levels, the FS register will
resume normal operation.
An under voltage condition at the VPWR pin will not cause
output shutdown and reset. When VPWR is between 5.5 V and
9.0 V, the output will operate per the command word. However,
the status as reported by the serial data output (DO) pin may
not be accurate below 9.0 V VPWR. Proper operation at VPWR
voltages below 5.5 V can not be guaranteed.
Output Voltage Clamp
Each output of the 33880 incorporates an internal voltage
clamp to provide fast turn-off and transient protection of each
output. Each clamp independently limits the drain-to-source
voltage to 45 V for low side drive configurations and -20 V for
high side drive configurations. The total energy clamped (EJ)
can be calculated by multiplying the current area under the
current curve (IA) times the clamp voltage (VCL).
Characterization of the output clamps, using a single pulse
non-repetitive method at 0.3 A, indicate the maximum energy to
be 50 mJ at 150°C junction temperature per output.
Figure 13. Output Voltage Clamping
SPI Configurations
The SPI configuration on the 33880 device is consistent with
other devices in the OSS family. This device may be used in
serial SPI or parallel SPI with the 33298 and 33291. Different
SPI configurations may be provided. For more information,
contact Motorola SMARTMOS
Analog Products Division or
local Motorola representative.
Reverse Battery
The 33880 has been designed with reverse battery
protection on VPWR pin. However, the device does not protect
the load from reverse battery. During the reverse battery
condition, current will flow through the load and the output
MOSFET substrate diode. Under this circumstance, relays may
energize and lamps will turn on. No damage will occur to the
33880. If load reverse battery protection is desired a diode must
be placed in series with the load.
Current
Area (IA)
Clamp Energy
(EJ = IA x VCL)
Clamp Energy
(EJ = IA x VCL)
Drain Voltage
Source Voltage
Time
BAT
Drain-to-Source Clamp
Voltage (VCL = 40 V)
Drain Current
(ID = 0.3 A)
GND
VS
Drain-to-Source ON
Voltage (VDS(ON))
Drain-to-Source ON
Voltage (VDS(ON))
Current
Area (IA)
Source Current
(IS = 0.3 A)
Source Clamp Voltage
(VCL = -20 V)
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